Emanuel Hazani and Patent Enforcement Fund, Inc., Appellants, v. United States International Trade Commission, Appellee,andmitsubishi Electric Corporation and Mitsubishi Electronicsamerica, Inc.,andnec Corporation and Nec Electronics, Inc.,andoki Electric Industry Co., Ltd. and Oki America, Inc.,andsamsung Electronics Co., Ltd., Samsung Electronics America,inc., and Samsung Semiconductor, Inc., Intervenors, 126 F.3d 1473 (Fed. Cir. 1998)Annotate this Case
Marcus J. Millett, Lerner, David, Littenberg, Krumholz & Mentlik, Westfield, NJ, for appellants. With him on brief was Charles P. Kennedy. Co-Counsel for Patent Enforcement Fund, Inc. was Theodore I. Botter, Fair Lawn, NJ.
Mark D. Kelly, Attorney, United States International Trade Commission, for appellee. With him on brief were Lyn M. Schlitt, General Counsel, and James A. Toupin, Deputy General Counsel.
Robert M. Taylor, Jr., Lyon & Lyon, Costa Mesa, CA, submitted on brief for Intervenors Mitsubishi Electric Corporation and Mitsubishi Electronics America, Inc. With him on brief was David B. Murphy. Of counsel was Kevin M. O'Brien, Baker & McKenzie, Washington, DC.
J. Frank Osha, Sughrue, Mion, Zinn, Macpeak & Seas, Washington, DC, submitted on brief for Intervenors NEC Corporation and NEC Electronics Inc. With him on brief were Joseph Bach, Howard L. Bernstein, Alan J. Kasper and Kevin A. Wolff. Of counsel were Italo H. Ablondi, David Foster and Sturgis M. Sobin, Ablondi, Foster, Sobin & Davidow, Washington, DC.
Jared B. Bobrow, Weil, Gotshal & Manges, LLP, Menlo Park, CA, argued for Intervenors OKI Electric Industry Co., LTD and OKI America, Inc. With him on brief were Matthew D. Powers and Paul M. Saraceni.
Cecilia H. Gonzalez, Howrey & Simon, Washington, DC, argued for Intervenors Samsung Electronics Co., LTD, Samsung Electronics America, Inc. and Samsung Semiconductor, Inc. With her on brief were Thomas J. Scott, Jr. and Juliana M. Cofrancesco.
Before PLAGER, SCHALL, and BRYSON, Circuit Judges.
BRYSON, Circuit Judge.
This case involves semiconductor memory cells. Appellants Emanuel Hazani and Patent Enforcement Fund, Inc. (collectively Hazani), petitioned for relief in the United States International Trade Commission (ITC) against a number of importers of electronic products. Hazani contended that the importers were engaged in unfair import trade practices, in violation of 19 U.S.C. § 1337, because their importation and sale of imported goods in the United States infringed Hazani's rights under a U.S. patent relating to semiconductor memory cells. The ITC denied relief on the ground that the asserted claims of Hazani's patent were either invalid or not infringed by the respondents. We affirm.
Semiconductor memories generally consist of a number of individual memory cells. One type of semiconductor memory is an electrically erasable programmable read-only memory (EEPROM). EEPROMs are non-volatile memories; that is, the data stored in the memory cells of an EEPROM is not lost when the power to the memory device is turned off.
An EEPROM cell includes a field-effect transistor (FET), which has a control gate, and source and drain regions formed in a substrate. In an FET, the control gate is formed above a dielectric insulator that is deposited over the area between the source and drain regions. As voltage is applied to the control gate, mobile charged particles in the substrate form a conduction channel in the region between the source and drain regions. Once the channel forms, the transistor turns "on" and current may flow between the source and drain regions.
An EEPROM may be formed by adding a "floating gate," a conductive plate located in the dielectric insulator between the control gate and the channel region. The control gate, dielectric insulator, and floating gate form a capacitor that is capable of storing charge on the floating gate. If the floating gate is storing charge of an appropriate polarity, the FET of the EEPROM cannot turn on, thus indicating one memory state. When the floating gate is not storing any charge, the FET may operate as it does in the absence of the floating gate, which indicates the other memory state.
Hazani owns U.S. Patent No. 5,166,904 (the '904 patent) entitled "EEPROM Cell Structure And Architecture With Increased Capacitance and With Programming and Erase Terminals Shared Between Several Cells." The claims of the '904 patent are not explicitly limited to EEPROM semiconductor memory cells, but generally relate to a semiconductor memory cell having features found in EEPROM cells.
Hazani filed a complaint with the ITC alleging that certain dynamic random access memory devices (DRAMs) imported by suppliers of electronic components infringe various claims of the '904 patent. In early 1995, the ITC began an investigation of Hazani's complaint, naming the importers and their American distributors as respondents.
The administrative law judge to whom the case was assigned ruled in favor of the respondents, issuing three summary dispositions, the last of which terminated the investigation. The administrative law judge ruled that all of the asserted claims except claim 14 were anticipated under 35 U.S.C. § 102(e) by U.S. Patent No. 4,758,986 to Kuo. Claim 14, the administrative law judge ruled, was not infringed by any of the accused products. The ITC declined to review the summary determination orders and the order terminating the investigation.
On appeal, Hazani challenges all three summary determinations. The question whether a summary determination is proper is a question of law. See 19 C.F.R. § 210.18(b) (summary determination is proper "if the evidence of record show [s] that there is no genuine issue as to any material fact and that the moving party is entitled to summary determination as a matter of law"). We review summary determinations de novo. See Intellicall, Inc. v. Phonometrics, Inc., 952 F.2d 1384, 1387, 21 USPQ2d 1383, 1386 (Fed. Cir. 1992). Because the administrative law judge has not made any factual determinations at this stage in the proceedings, the substantial evidence standard of review is not applicable. Contrary to the ITC's suggestion, LaBounty Manufacturing, Inc. v. United States International Trade Commission, 867 F.2d 1572, 9 USPQ2d 1995 (Fed. Cir. 1989), does not hold otherwise.
* Hazani first challenges the determination that claims 1-2, 4-13, 15-17, 22, and 25 are anticipated by Kuo. Claim 1 is representative; it recites:
1. A semiconductor memory cell including a capacitor that is coupled to a field effect transistor (FET), said memory cell and said capacitor and said transistor are formed on a semiconductor substrate and wherein said capacitor is insulated from the control gate of said transistor, and said capacitor comprising:
an electrically conductive polysilicon first plate having a surface that was textured to have a predetermined pattern;
a first insulator constituting an oxide dielectric layer being disposed over and in contact with said textured surface of said polysilicon first plate;
a second insulator having at least one dielectric layer with a higher dielectric constant than the dielectric constant of said oxide layer, said second insulator being disposed along and in contact with said first insulator so that said first insulator is disposed between said first plate and said second insulator;
a second plate of an electrically conductive material being disposed along and in contact with said second insulator to form a sandwich wherein said dielectric layers are disposed between said plates, thereby said capacitor exhibiting increased capacitance and said capacitor exhibiting reduced charge transport capability between said plates so that it is lower than the charge transport capability characteristically exhibited by said first insulator alone in all modes of operation of said memory cell.
Hazani raises two main challenges to the anticipation ruling. First, Hazani argues that claim 1 requires a structure that stores charge in all modes of operation, and that the Kuo patent does not disclose such a structure. Second, Hazani argues that Kuo's structure does not inherently satisfy the "increased capacitance" and "reduced charge transport" limitations in the "thereby" clause of claim 1.
* The ITC and the respondents contend that the arguments Hazani presses upon us were not timely raised before the administrative law judge and therefore should be deemed waived. Before the initial determination, Hazani argued only that Kuo did not disclose a capacitor or "make [ ] any explicit reference to an 'increased capacitance' or to a 'reduced charge transport capability.' " Only on reconsideration did Hazani argue (1) that Kuo does not disclose a structure inherently satisfying the limitations of the "thereby" clause of claim 1, and (2) that the claims of the '904 patent require a structure that stores charge in all modes of operation.
The administrative law judge denied Hazani's motion for reconsideration, holding that Hazani's new arguments should have been raised prior to the original ruling. In the alternative, the administrative law judge concluded that in any event the new arguments would not change the outcome of the case. The ITC declined to review the administrative law judge's summary determination.
We find no legal error in the administrative law judge's determination that the arguments that Hazani raised for the first time on reconsideration were untimely and could properly be rejected on that ground alone. Like the administrative judge, however, we have examined those arguments and have concluded that even if they had been timely raised, they would not have led to a different result.
To anticipate a claim, a prior art reference must disclose every feature of the claimed invention, either explicitly or inherently. See Glaxo Inc. v. Novopharm Ltd., 52 F.3d 1043, 1047, 34 USPQ2d 1565, 1567 (Fed. Cir. 1995). Whether a claim feature is inherent in a prior art reference is a factual issue on which extrinsic evidence may be submitted. See Continental Can Co. USA v. Monsanto Co., 948 F.2d 1264, 1268, 20 USPQ2d 1746, 1749 (Fed. Cir. 1991). For summary determination to be proper, there must be no genuine dispute whether the limitations of the claimed invention are disclosed, either explicitly or inherently, by an allegedly anticipating prior art reference. See Avia Group Int'l, Inc. v. L.A. Gear Cal., Inc., 853 F.2d 1557, 1561-62, 7 USPQ2d 1548, 1552 (Fed. Cir. 1988).
Hazani argues that a capacitor within the meaning of the '904 patent must be capable of storing charge in all modes of operation and that the purported capacitor in Kuo does not have that property. The pertinent portion of Kuo discloses a structure having two conductive plates separated by a dielectric insulator, which is the structure of a capacitor. During the erase mode of Kuo's memory cell, that structure exhibits tunneling, i.e., it allows current to pass between the two plates. Because tunneling is by definition inconsistent with the storage of charge, Hazani argues that Kuo's structure stores charge only in certain modes of operation and therefore cannot be considered a "capacitor," as that term is used in the '904 patent.
Contrary to Hazani's argument, claim 1 of the '904 patent does not require a structure that stores charge in all modes of operation. Instead, the claim recites a capacitor and specifies the structural characteristics of that capacitor. The particular capacitor recited in the claim is defined as having two insulators between two conductive plates, one of the insulators having a higher dielectric constant than the other. Thus, the claim defines the term "capacitor" in structural terms; it does not define the term by reference to a function that must be performed under all circumstances. While a capacitor is commonly defined as a device that is capable of storing charge, see, e.g., Richard C. Dorf, Electrical Engineering Handbook 30 (1993), a device that performs that function may still be referred to as a capacitor even if, under certain circumstances, it does not store charge but exhibits some other property such as tunneling.
Pointing to the "thereby" clause of the claim, Hazani argues that the phrase "in all modes of operation of the memory cell" in that clause supports its argument that the capacitor recited in the '904 patent must store charge in "all modes of operation." That argument, however, is based on a contorted reading of the claim language. The phrase "in all modes of operation of the memory cell" refers to a comparison of the claimed two-insulator capacitor and a similar capacitor with a single insulator; it does not suggest that a device is not a capacitor, within the meaning of the claim, if it does not store charge in all modes of operation. The "in all modes of operation" phrase immediately follows and specifically refers to the requirement that the claimed two-insulator structure exhibit charge transport capability that is "lower than the charge transport capability characteristically exhibited by said first insulator alone." It is thus the reduced charge transport capability compared to a one-insulator structure that the capacitor must exhibit "in all modes of operation."
Under this interpretation, it is clear that Kuo discloses each and every feature recited in claim 1 of the '904 patent. Hazani does not dispute that Kuo's structure stores charge under certain operating conditions. Nor is there any ground for dispute that Kuo's structure exhibits reduced charge transport, compared to a one-insulator device, in all modes of its operation. Additionally, Kuo specifically discloses the use of a "multi-layer" insulator between the two plates, which can consist of an oxide-nitride-oxide (ONO) layered dielectric insulator. Although Hazani argues that Kuo does not disclose that the layers of oxide, nitride, and oxide are uniform between the two plates, the claims do not so require. For that reason, disclosure of an ONO insulator between the plates is sufficient.
The evidence before the administrative law judge established that the first insulator in Kuo, an oxide, has a lower dielectric constant than the second insulator, a nitride, and that such a structure exhibits lower charge transport capability in all modes of operation than a similar device with a single oxide insulator. In particular, the respondents submitted a declaration by an expert, Dr. Caywood, who stated that a capacitor with an ONO insulator structure, as disclosed in Kuo, would necessarily exhibit increased capacitance and reduced charge transport capability as compared to a capacitor with an oxide insulator alone. Dr. Caywood stated that Kuo disclosed the same physical structure as recited in the claims of the '904 patent and therefore Kuo's structure would necessarily exhibit the same properties. In addition, one of Hazani's own experts, Mr. Greene, responded affirmatively when asked whether the ONO insulator structure of Kuo would inherently yield reduced charge transport capability compared to the charge transport capability of an oxide-only insulator.
Hazani argues that the administrative judge improperly characterized Mr. Greene's testimony as an admission that the structure disclosed by Kuo would inherently result in increased capacitance and reduced charge transport capability compared to an otherwise similar structure with a single oxide insulator. Dr. Caywood's declaration alone, however, is sufficient to support the administrative law judge's summary determination. Even if Mr. Greene's testimony should not be interpreted in a manner that supports the administrative law judge's determination, that testimony does not create a factual dispute because it does not contradict Dr. Caywood's statements on the issue of the respective charge transport capability of the two insulator structures in question.
While the motion for summary determination was pending, Hazani did not submit any evidence in response to the evidence relied on by the respondents. Only on reconsideration did Hazani argue that the characteristics recited in the thereby clause of claim 1 were not inherent in the Kuo structure. At that late stage, after the administrative law judge had already granted the respondents' motion for summary determination, Hazani submitted testimony from another of its experts, Dr. Oldham, in an effort to create a factual dispute as to whether the Kuo structure inherently possessed reduced charge transport capability compared to a one-insulator device.
Dr. Oldham's testimony was not presented to the administrative law judge in a timely matter. At the summary determination stage, Hazani was put on notice that the respondents were contending that many of the limitations of the claims were inherent in Kuo's disclosure. While we have considered arguments that Hazani did not raise in response to the summary determination motion, we find no reason to allow Hazani to rely on evidence that was not timely presented to the administrative law judge. Accordingly, we will not consider Hazani's argument to the extent that it relies on Dr. Oldham's deposition testimony. Based on the evidence that was before him at the time he ruled on the summary determination motion, the administrative law judge properly concluded that there was no genuine issue of material fact as to whether the two-insulator device disclosed in Kuo exhibited reduced charge transport when compared to a similar device with a single-oxide insulator.
Hazani makes the further argument that Kuo's structure does not anticipate claim 1 because the combination of surface asperities and an ONO insulator would not necessarily result in increased capacitance or reduced charge transport capability. Hazani relies on U.S. Patent No. 4,750,360 to Faraone, a declaration by Faraone, deposition testimony by Dr. Caywood, and deposition testimony by another expert, Dr. Gosney, to argue that one of ordinary skill in the art would use a thick ONO insulator when introducing asperities on one of the plates of the capacitor. A thicker insulator would result in reduced capacitance and increased charge transport capability, rather than the contrary. Again, however, none of that evidence was presented to the administrative law judge before his initial determination. We therefore decline to consider that evidence in light of its untimely presentation to the administrative law judge.
In support of his contention that all of the evidence submitted to the administrative law judge, even the untimely evidence, should be considered on appeal, Hazani argues that the untimely evidence was considered and addressed by the administrative law judge on reconsideration and that the ITC therefore necessarily must have considered that evidence as a basis for its decision not to review the administrative law judge's decision. We disagree. The administrative law judge found that all of the newly submitted arguments and evidence were untimely, and addressed the merits of the untimely arguments and evidence only in the alternative. The ITC's decision not to review the administrative law judge's determination therefore cannot be said to be based on consideration of the untimely evidence. For that reason, the Commission's decision can be upheld on the ground, invoked by the administrative law judge, that much of the evidence on which Hazani now relies was not properly presented.
Hazani also challenges the ITC's final determination that claims 18-20 and 26-28 are anticipated by Kuo. Claim 18 is representative. The only relevant difference between claim 18 and claim 1 is that claim 1 recites that the first plate has a "textured" surface, whereas claim 18 recites that the first plate has a "chemically engraved" surface. Because Hazani did not present any evidence that the product described in Kuo and the product recited in claim 18 are different, the administrative law judge determined that the "chemically engraved" limitation was irrelevant to patentability. Accordingly, the administrative law judge held claims 18-20 and 26-28 invalid as anticipated by Kuo.
Hazani argues that the "chemically engraved" claims are product-by-process claims. We agree with the respondents, however, that those claims are best characterized as pure product claims, since the "chemically engraved" limitation, read in context, describes the product more by its structure than by the process used to obtain it. See In re Moore, 439 F.2d 1232, 1236, 58 C.C.P.A. 1042, 169 USPQ 236, 239 (1971); In re Garnero, 412 F.2d 276, 278-79, 56 C.C.P.A. 1289, 162 USPQ 221, 223 (1969). As such, the claims are anticipated, because the claimed products are found in the prior art.
The specification of the '904 patent describes the "chemically engraved" surfaces as "textured with asperities" as a result of oxidation. See '904 patent, col. 7, lines 47-51 ("the floating gate 30's surface is oxidized ... such that mainly the top surface of layer 30 ... is textured with asperities"). Kuo similarly discloses a conductive plate and states that a surface of the conductive plate adjoining the insulator may be textured with asperities. See Kuo, col. 4, lines 41-43 ("Asperities, or roughness, of the polysilicon-dielectric interfaces are relied upon to decrease the erase voltages to reasonable levels."). In addition, the respondents submitted an affidavit from Dr. Caywood attesting to the fact that one of ordinary skill in the art would conclude that the asperities associated with oxidation are the same as those disclosed in Kuo.
Based on the record before him, the administrative law judge was justified in concluding that the chemically engraved products disclosed in the '904 patent, i.e., surfaces that have asperities of the sort produced by oxidation, are identical for all relevant purposes to the product described by Kuo. The administrative law judge therefore correctly concluded held that the "chemically engraved" claims in the '904 patent fail to define a novel product and are thus invalid.
Hazani next challenges the summary determination that certain products imported by the respondents do not infringe claim 14. The claim language in dispute states: "said third conductive connecting means is a bit line of said array that is integrally formed in said substrate; and wherein said bit line comprising [sic] impurities." The administrative law judge determined that the claims require a bit line that is entirely formed within the substrate. Hazani, on the other hand, argues that the bit line need only be partially formed within the substrate.
We agree with the administrate law judge's interpretation. The claims require that the bit line be "integrally formed in" the substrate, which we interpret to mean that the entire bit line must be located within the substrate. Although the term "integrally formed in" is not defined in the written description portion of the specification, the word "integral" means "complete" or "entire," and the word "in," as used in this context, means "indicating a point or place thought of as spatially surrounded or bounded." See Webster's New International Dictionary 1253, 1290 (2d ed.1939).
Hazani has not given us any reason to depart from the ordinary meaning of those words. Accordingly, the term "integrally formed in," as used in claim 14, requires that the bit line be formed entirely within the substrate. Under that interpretation of claim 14, the accused products do not infringe. We therefore uphold the ITC's ruling on the issue of infringement as well as on the invalidity issues.