XMTT, Inc. v. Intel Corporation, No. 1:2018cv01810 - Document 117 (D. Del. 2020)
Court Description: MEMORANDUM OPINION providing claim construction for multiple terms in U.S. Patent Nos. 7,707,388 and 8,145,879. Within five days the parties shall submit a proposed order consistent with this Memorandum Opinion suitable for submission to the jury. Signed by Judge Richard G. Andrews on 5/12/2020. (nms)
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XMTT, Inc. v. Intel Corporation Doc. 117 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 1 of 14 PageID #: 1857 IN THE UNITED STATES DISTRICT COURT FOR THE DISTRICT OF DELAWARE XMTT, INC., Plaintiff, v. Civil Action No. 18-cv-1810-RGA INTEL CORPORATION, Defendant. MEMORANDUM OPINION Brian E. Farnan, Michael J. Farnan, FARNAN LLP, Wilmington, DE; Morgan Chu, Ben Hattenbach (argued), Anthony Rowles (argued), Conor Tucker, IRELL & MANELLA LLP, Los Angeles, CA; Attorneys for Plaintiff Jack B. Blumenfeld, Jeremy A. Tigan, MORRIS, NICHOLS, ARSHT & TUNNELL LLP, Wilmington, DE; Paul A. Bondor (argued), Laurie N. Stempler (argued), Jeffrey S. Seddon, Michael Wueste, Priyanka R. Dev, Thomas J. Derbish, DESMARAIS LLP, New York, NY; Attorneys for Defendant May 12, 2020 Dockets.Justia.com Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 2 of 14 PageID #: 1858 /s/ Richard G. Andrews ANDREWS, U.S. DISTRICT JUDGE: Before the Court is the issue of claim construction of multiple terms in U.S. Patent Nos. 7,707,388 (“the ’388 patent”) and 8,145,879 (“the ’879 patent”). The Court has considered the Parties’ Joint Claim Construction Brief. (D.I. 79). The Court heard oral argument by videoconference on April 30, 2020. (D.I. 114). I. BACKGROUND Plaintiff filed this action on November 16, 2018, alleging infringement of the ’388 and ’879 patents. (D.I. 1). The asserted patents are directed to a “computer memory architecture for hybrid serial and parallel computing systems.” (D.I. 79 at 3; see 388 patent at 1:25-27). II. LEGAL STANDARD “It is a bedrock principle of patent law that the claims of a patent define the invention to which the patentee is entitled the right to exclude.” Phillips v. AWH Corp., 415 F.3d 1303, 1312 (Fed. Cir. 2005) (en banc) (internal quotation marks omitted). “‘[T]here is no magic formula or catechism for conducting claim construction.’ Instead, the court is free to attach the appropriate weight to appropriate sources ‘in light of the statutes and policies that inform patent law.’” SoftView LLC v. Apple Inc., 2013 WL 4758195, at *1 (D. Del. Sept. 4, 2013) (quoting Phillips, 415 F.3d at 1324) (alteration in original). When construing patent claims, a court considers the literal language of the claim, the patent specification, and the prosecution history. Markman v. Westview Instruments, Inc., 52 F.3d 967, 977–80 (Fed. Cir. 1995) (en banc), aff’d, 517 U.S. 370 (1996). Of these sources, “the specification is always highly relevant to the claim construction analysis. Usually, it is dispositive; it is the single best guide to the meaning of a disputed term.” Phillips, 415 F.3d at 1315 (internal quotation marks omitted). 1 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 3 of 14 PageID #: 1859 “[T]he words of a claim are generally given their ordinary and customary meaning. . . . [Which is] the meaning that the term would have to a person of ordinary skill in the art in question at the time of the invention, i.e., as of the effective filing date of the patent application.” Id. at 1312–13 (citations and internal quotation marks omitted). “[T]he ordinary meaning of a claim term is its meaning to [an] ordinary artisan after reading the entire patent.” Id. at 1321 (internal quotation marks omitted). “In some cases, the ordinary meaning of claim language as understood by a person of skill in the art may be readily apparent even to lay judges, and claim construction in such cases involves little more than the application of the widely accepted meaning of commonly understood words.” Id. at 1314. When a court relies solely upon the intrinsic evidence—the patent claims, the specification, and the prosecution history—the court’s construction is a determination of law. See Teva Pharm. USA, Inc. v. Sandoz, Inc., 135 S. Ct. 831, 841 (2015). The court may also make factual findings based upon consideration of extrinsic evidence, which “consists of all evidence external to the patent and prosecution history, including expert and inventor testimony, dictionaries, and learned treatises.” Phillips, 415 F.3d at 1317–19 (internal quotation marks omitted). Extrinsic evidence may assist the court in understanding the underlying technology, the meaning of terms to one skilled in the art, and how the invention works. Id. Extrinsic evidence, however, is less reliable and less useful in claim construction than the patent and its prosecution history. Id. “A claim construction is persuasive, not because it follows a certain rule, but because it defines terms in the context of the whole patent.” Renishaw PLC v. Marposs Societa’ per Azioni, 158 F.3d 1243, 1250 (Fed. Cir. 1998). It follows that “a claim interpretation that would 2 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 4 of 14 PageID #: 1860 exclude the inventor’s device is rarely the correct interpretation.” Osram GMBH v. Int’l Trade Comm’n, 505 F.3d 1351, 1358 (Fed. Cir. 2007) (citation and internal quotation marks omitted). III. CONSTRUCTION OF DISPUTED TERMS 1. “prior to a transition from a serial processing mode to a parallel processing mode” a. Plaintiff’s proposed construction: “before a point in time when the plurality of parallel processors begin processing the software instructions in the software program from the serial processor and execute instructions in the software program in parallel” b. Defendant’s proposed construction: “before the point in time when the plurality of parallel processors take over processing the software instructions in the software program from the serial processor and execute instructions in the software program in parallel” c. Court’s construction: “before the point in time when the plurality of parallel processors take over processing the software instructions in the software program from the serial processor and execute instructions in the software program in parallel” Before the April 30, 2020 Markman hearing, Plaintiff agreed to Defendant’s construction for this term. (D.I. 84). Thus, I construe “prior to a transition from a serial processing mode to a parallel processing mode” to mean “before the point in time when the plurality of parallel processors take over processing the software instructions in the software program from the serial processor and execute instructions in the software program in parallel.” 2. 3. “plurality of partitioned memory modules” “plurality of shared memory modules” a. Plaintiff’s proposed constructions: Term 2: “multiple memory modules each subdivided into multiple sub-units” Term 3: “multiple memory modules that are shared by multiple processors” b. Defendant’s proposed construction: Both terms: “a plurality of memory modules shared across all parallel processors wherein each logical address resides in only one memory module” c. Court’s constructions: Term 2: “multiple memory modules each subdivided into multiple sub-units” Term 3: “multiple memory modules that are shared by multiple processors” 3 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 5 of 14 PageID #: 1861 The asserted claims of the ’388 patent include the language “plurality of partitioned memory modules.” 1 The asserted claims of the ’879 patent contain similar but different language: “plurality of shared memory modules.” 2 Defendant argues that these two terms “are used interchangeably” and should have the same construction because they “mean the same thing in the context of the patents-in-suit.” (D.I. 79 at 26-27). Defendant asserts that “the claim language demonstrates that ‘partitioned’ and ‘shared’ memory modules are just two different names for the same structure, performing the same claimed functions.” (Id. at 28). Defendant continues that the specifications of the ’388 and ’879 patents also indicate that the terms refer to the same structure. (Id. at 29). Defendant relies on several Federal Circuit cases to support its assertion that the different terms have the same meaning. (See id. at 27-28, 30, 45). For example, Defendant cites to Curtiss-Wright Flow Control Corp. v. Velan, Inc., 438 F.3d 1374, 1380-81 (Fed. Cir. 2006), Hormone Research Foundation, Inc. v. Genentech, Inc., 904 F.2d 1558, 1567 n.15 (Fed. Cir. 1990), and Apple, Inc. v. Ameranth, Inc., 842 F.3d 1229, 1238 (Fed. Cir. 2016) to show that the Federal Circuit has found different terminology from different claims of the same patent to properly define the same subject matter. (D.I. 79 at 27-28). These cases, however, are inapposite because, in the instant case, the two terms are not used in the claims of the same patent. Instead, the claims of one patent use one of the terms, and the claims of the other patent use the other term. The claims of neither patent use both terms. Defendant also points to Wasica Finance GmbH v. Continental Automotive Systems, Inc., 853 F.3d 1272, 1282 (Fed. Cir. 2017) and Edwards Lifesciences LLC v. Cook Inc., 582 F.3d 1 2 ’388 Patent, Claims 1, 4, 12, 13, 18, 19, 20, 32, 33, 38. (D.I. 79 at 21). ’879 Patent, Claims 1, 2, 4, 7, 13, 14, 19, 20, 21, 23, 30, 31, 32, 34, 37. (D.I. 79 at 21). 4 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 6 of 14 PageID #: 1862 1322, 1329 (Fed. Cir. 2009) to support the notion that two different terms can properly be construed to have the same meaning when used interchangeably throughout the specification and claims of a patent. (D.I. 79 at 30, 45). This is not the situation in the instant case. The specification of the ’879 patent does recite both “partitioned memory module” and “shared memory module,” but the two are never “conflate[d]” in the same sentence as terms at issue as in Wasica. 853 F.3d at 1282 n.6. Furthermore, there is nothing in the specification of the ’879 patent to suggest that the patentee was acting as a lexicographer and used “partitioned” and “shared” memory modules in a way that was “akin to a definition equating the two.” Edwards Lifesciences, 582 F.3d at 1329. Despite Defendant’s efforts to show that the patents contemplate “partitioned” and “shared” memory modules to mean the same thing, I do not think that the patents do. “Partitioned memory modules” is only recited in the claims of the ’388 patent, not those of the ’879 patent. “Shared memory modules” is only recited in the claims of the ’879 patent, not those of the ’388 patent. Plaintiff thus argues that the two terms should be construed separately. (D.I. 79 at 21 n.5). I agree. Plaintiff asserts that a person of ordinary skill in the art at the time of the invention 3 would have understood that “‘partitioned’ memory modules are modules that have been subdivided into smaller sub-units.” (Id. at 22). Plaintiff arrives at this understanding from two dictionary definitions. The Modern Dictionary of Electronics (1999) defines “partitioning” as, “In a computer, subdividing a large block into a smaller, more conveniently handled subunits.” (D.I. 80, Ex. 3 at JA 37). Similarly, the McGraw-Hill Dictionary of Computing & 3 Both the ’388 and ’879 patent claim priority to a provisional patent application filed on November 29, 2005. This date is therefore the relevant date for determining what a person of ordinary skill in the art would have known at the time of the invention. 5 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 7 of 14 PageID #: 1863 Communications (2003) defines “partition” as, “One of a number of fixed portions into which a computer memory is divided in certain multiprogramming systems.” (Id., Ex. 4 at JA 41). Thus, Plaintiff contends that “partitioned memory modules” should mean “multiple memory modules each subdivided into multiple sub-units.” (D.I. 79 at 21). Separately, Plaintiff argues that a person of ordinary skill in the art in 2005 would have understood “shared memory” in the ’879 patent to mean “memory that is shared by more than one processor.” (Id. at 24). Plaintiff relies on the Wiley Electrical and Electronics Engineering Dictionary (2004), which defines “shared memory” as, “Memory, such as RAM, which can be accessed by two or more resources, programs, systems, terminals, users, or the like.” (D.I. 80, Ex. 5 at JA 47). Plaintiff points out that this understanding is also reflected in the specification of the ’879 patent, which recites that data stored in the shared memory modules “is available to other parallel processors 12 and/or serial processor 14.” (D.I. 79 at 24; ’879 patent at 7:45-47). Plaintiff thus proposes that “plurality of shared memory modules” is properly construed as “multiple memory modules that are shared by multiple processors.” (D.I. 79 at 21). At oral argument, Defendant agreed that the term “partitioned memory” and the term “shared memory” were each well known in the art. (D.I. 114 at 27:19-20, 28:8-12). Defendant argued that the terms here were used in a way different from that understood by a person of ordinary skill in the art and that the additional word “module” contributes to this difference. (D.I. 114 at 28:13-14). To the extent that Defendant’s argument that the terms diverge from the ordinary use because they mean the same thing as each other, I am not convinced for the reasons previously stated. Further, Defendant has given no reason as to why the additional word “module,” often considered a nonce word, would make a difference to the understanding of a person of ordinary skill in the art. (See D.I. 114 at 28:15-29:9). 6 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 8 of 14 PageID #: 1864 Defendant’s proposed construction contains the limitation requiring that “each logical address resides in only one memory module.” (D.I. 79 at 22). Defendant argues that this limitation should be included in the construction because the ’388 and ’879 patents “repeatedly and consistently describe ‘partitioned’ and ‘shared’ memory modules in one way: modules that are ‘partitioned such that each valid logical address can be found in one module.’” (Id. at 31). Defendant asserts that the limitation therefore must be included in “the ordinary meaning of the terms in the context of the patents-in-suit.” (Id. at 32). I disagree. The specification of each patent only mentions this limitation as an example or a possible embodiment: “For example, memory modules 10 may be partitioned such that each valid logical address can be found in one module 10” (’388 patent, 4:65-66; ’879 patent, 5:5-6); “In one embodiment . . . each logical address resides in exactly one of the parallel memory modules.” (’388 patent, 7:1-7; ’879 patent, 7:10-16). “[A]s a general rule claims of a patent are not limited to . . . examples listed within the patent specification,” and I see no reason to diverge from this rule here. Glaxo Wellcome, Inc. v. Andrx Pharmaceuticals, Inc., 344 F.3d 1226, 1233 (Fed. Cir. 2003). I therefore determine that a person of ordinary skill in the art in 2005 would understand these two terms in the way proposed by Plaintiff. Thus, I construe “plurality of partitioned memory modules” to mean “multiple memory modules each subdivided into multiple sub-units” and “plurality of shared memory modules” to mean “multiple memory modules that are shared by multiple processors.” 4. “parallel processor . . . having . . . a read-only memory” a. Plaintiff’s proposed construction: “parallel processor having a memory such that the parallel processor may not generally modify the data stored therein” b. Defendant’s proposed construction: “memory for a parallel processor that stores updated data generated by the parallel processor only when the updated data is already available to other parallel processors and/or a serial processor” 7 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 9 of 14 PageID #: 1865 c. Court’s construction: “memory, in which the stored data is otherwise unmodifiable by a parallel processor, that stores updated data generated by the parallel processor only when the updated data is also stored in one or more of the shared memory modules so that the updated data is available to other parallel processors and/or serial processor” Defendant contends that the term to be construed should be “read-only memory.” (D.I. 79 at 49 n.15). Plaintiff wants the preceding claim language (“parallel processor . . . having a . . .”) to be included in the construction as well. (Id.). Neither party briefed the issue and the oral argument focused only on the construction of “read-only memory.” Thus, I will only construe “read-only memory.” At the time of the invention, “read-only memory” was understood in the art to mean memory where “data may be read but not changed or deleted.” (See D.I. 80, Ex. C, The New IEEE Standard Dictionary of Electrical and Electronics Terms, 5th ed. (1993) at JA 204; see also id., Ex. D, Oxford Dictionary of Computing, 4th ed. (1996) at JA 209-10; id., Ex. E, Dictionary of Computer and Internet Terms, 6th ed. (1998) at JA 216; id., Ex. F, The Computer Desktop Encyclopedia, 2nd ed. (1999) at JA 221). Defendant argues for a construction of “read-only memory” in the context of the ’879 patent that diverges from the plain and ordinary meaning. (See id. at 52). At oral argument, Plaintiff asserted that its definition was the plain and ordinary meaning and that the technical dictionary definitions Defendant provided support that meaning. (D.I. 114 at 60:10-61:13). But I am not convinced that a person of ordinary skill in the art would understand the term “read-only memory” to be the construction advocated for by Plaintiff. The technical dictionaries say otherwise. They are definitive and do not suggest the possibility that “read-only memory” is able to be modified in certain circumstances. I therefore understand Plaintiff’s proposed construction—that a “parallel processor may not generally modify the data 8 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 10 of 14 PageID #: 1866 stored” in its “read-only memory”—to diverge from the plain and ordinary meaning of “readonly memory” where “data may be read but not changed or deleted.” Claim construction that departs from the plain and ordinary meaning of a term is allowed when the patentee has acted as his or her own lexicographer. Thorner v. Sony Computer Entertainment America LLC, 669 F.3d 1362, 1365 (Fed. Cir. 2012). To do so, “a patentee must ‘clearly set forth a definition of the disputed claim term’ other than its plain and ordinary meaning.” Id. (quoting CCS Fitness, Inc. v. Brunswick Corp., 288 F.3d 1359, 1366 (Fed. Cir. 2002). Explicit statements in the form of “I define ___ to mean ___” are not required, and the specification may define claim terms by implication where the claim meaning can be ascertained from it. Astrazeneca AB, Aktiebolaget Hassle, KBI-E, Inc. v. Mutual Pharmaceutical Co., 384 F.3d 1333, 1339-40 (Fed. Cir. 2004). “When the specification explains and defines a term used in the claims, without ambiguity or incompleteness, there is no need to search further for the meaning of the term.” Multiform Desiccants, Inc. v. Medzam, Ltd., 133 F.3d 1473, 1478 (Fed. Cir. 1998). Defendant argues that nine lines of the ’879 specification explicitly define what “readonly memory” is within the context of the ’879 patent. (D.I. 79 at 53). These lines read: When a register 302 (such as local cache, register or other memory for a parallel processor 12) is read-only (such that the parallel processor 12 may not generally modify the data stored in the register 302), updated data generated by the parallel processor 12 may be stored in the register 302 only when the updated data is also stored in one or more of the shared memory modules 10 so that the updated data is available to other parallel processors 12 and/or serial processor 14. (’879 patent, 7:39-47). Plaintiff counters that only the second parenthetical—“(such that the parallel processor 12 may not generally modify the data stored in the register 302)”—provides support for the proper construction of “read-only memory” and that the rest of the excerpt is only an example. (D.I. 79 at 58). I disagree with Plaintiff and determine that the entire excerpt 9 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 11 of 14 PageID #: 1867 provides the definition of “read-only memory” by implication. The patentee acted as a lexicographer and put a person of ordinary skill in the art on notice of that fact by including the second parenthetical which highlights the divergence from the plain and ordinary meaning of “read-only memory.” See In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994). The remaining lines of the excerpt clarify and complete the definition, describing the parameters of the patentee’s version of “read-only memory” as used in the ’879 patent. Plaintiff argues that the column 7 excerpt is part of a description of an embodiment and thus “is not intended to limit the invention.” (D.I. 79 at 51-52, 61-62). The column 7 excerpt, however, is not an embodiment. There is no language that indicates that the excerpt is an example of patentee’s read-only memory or that it is defining read-only memory only as it pertains to an embodiment. The lines preceding the excerpt use the phrase “may be” as a way of showing one possibility. (See ’879 patent, col. 7:31-36). In contrast to that tone, the column 7 excerpt is not introduced by any words suggesting that this version of read-only memory is only one possibility. There is no language akin to “for example” or “in this case.” The excerpt itself does not contain any similar words. The excerpt recites that “updated data . . . may be stored in the register only when . . .” to define the singular instance where the writing of updated data to the memory is allowed. (’879 patent, col. 7:42-43). Defendant’s proposed construction abbreviates the full definition provided by the entire column 7 excerpt. Therefore, I construe “read-only memory” to mean “memory, in which the stored data is otherwise unmodifiable by a parallel processor, that stores updated data generated by the parallel processor only when the updated data is also stored in one or more of the shared 10 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 12 of 14 PageID #: 1868 memory modules so that the updated data is available to other parallel processors and/or serial processor.” 4 5. “broadcast[ing] a . . . signal to the plurality of parallel processors” / “broadcast to the plurality of parallel processors” a. Plaintiff’s proposed construction: plain and ordinary meaning b. Defendant’s proposed construction: “broadcast[ing] a . . . signal to all of the parallel processors” / “broadcast to all of the parallel processors” c. Court’s construction: “broadcast . . . to the entire previously claimed group of parallel processors” The briefing presented the dispute over this term to be about the meaning of the word “the.” At the hearing, it seemed that the argument is not about “the” at all, and not really about the definition of “broadcast[ing],” but instead about whether or how the parallel processors react to the “broadcast” of the signal. In the briefing, Plaintiff argues that the term should have its plain and ordinary meaning, which would allow for the signal to be broadcast to fewer than all of the plurality of parallel processors. (D.I. 79 at 68). Defendant conversely seeks to add in language to require that the signal is broadcast to “all of” the claimed parallel processors. (Id. at 71). The parties agree that the recitation of “a plurality of parallel processors” in each relevant asserted claim provides the antecedent basis for “the plurality of parallel processors” in the same. (Id. at 66, 71). At oral argument, Defendant cautioned that this consensus did not resolve the disagreement about the 4 I do not use the word “generally” that the patentee used because I think the only deviation from the plain and ordinary meaning is that given in the construction. I do not think by “generally” the patentee meant to indicate an open-ended and undefined deviation from the plain and ordinary meaning. I think the patentee was using “generally” in the same sense as one would say, “the general rule is . . . .” The patentee has said there is an exception to the general rule. Thus, the meaning the patentee sets forth for “read-only memory” is the general rule with the one exception. 11 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 13 of 14 PageID #: 1869 claim scope. (D.I. 114 at 47:9-11). Defendant’s proposed construction, however, invites ambiguity as to the scope because it allows for the term to be understood as requiring a broadcast to all parallel processors in the system, rather than only those identified by the term providing the antecedent basis. As Defendant points out, the patentee designates less than all of a claimed plurality at many points in the patents. (See D.I. 79 at 72; ’388 patent, col. 2:42, 3:17-18, 9:11-12, 31-32, 11:2-3, 14:18-19, 15:3-4, 20-23; ’879 patent, col. 2:48-50, 3:25-26, 9:32-33, 52-53, 11:22-23). For example, claim 19 of the ’388 patent has one limitation that in part recites “a plurality of partitioned memory modules,” followed by a limitation that in part recites “to broadcast a prefetching signal to the plurality of parallel processors to initiate prefetching of data from at least a portion of the plurality of partitioned memory modules.” This limitation contrasts the recitation of “the plurality of partitioned memory modules” with “a portion of the plurality of partitioned memory modules.” (’388 patent, col. 15:14-23). There, “the plurality” refers to more than “a portion of the plurality.” Similarly, as applied to the asserted claims, it would follow that “the plurality of parallel processors” refers to the entire plurality, not a portion of the plurality, of the parallel processors identified by the antecedent basis. Therefore, I construe “broadcast[ing] a . . . signal to the plurality of parallel processors” / “broadcast to the plurality of parallel processors” to mean “broadcast . . . to the entire previously claimed group of parallel processors.” At oral argument I noted that the arguments about construing “broadcast” or otherwise construing the limitation in terms of whether the plurality of parallel processors receive the signal was not briefed, and I indicated I would therefore not be deciding that issue. (D.I. 114 at 55:24-56:1). 12 Case 1:18-cv-01810-RGA Document 117 Filed 05/12/20 Page 14 of 14 PageID #: 1870 III. CONCLUSION Within five days the parties shall submit a proposed order consistent with this Memorandum Opinion suitable for submission to the jury. 13
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