VLSI Technology LLC v. Intel Corporation, No. 5:2017cv05671 - Document 763 (N.D. Cal. 2023)
Court Description: ORDER DENYING 652 VLSI'S MOTION FOR RELIEF FROM NONDISPOSITIVE PRETRIAL ORDER OF MAGISTRATE JUDGE (public redacted version of sealed order filed at 722 ). Signed by Judge Beth Labson Freeman on 10/23/2023. (blflc3, COURT STAFF) (Filed on 10/23/2023)
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VLSI Technology LLC v. Intel Corporation Doc. 763 1 2 3 UNITED STATES DISTRICT COURT 4 NORTHERN DISTRICT OF CALIFORNIA 5 SAN JOSE DIVISION 6 7 VLSI TECHNOLOGY LLC, Plaintiff, 8 v. 9 United States District Court Northern District of California Case No. 17-cv-05671-BLF 10 INTEL CORPORATION, 11 Defendant. ORDER DENYING VLSI'S MOTION FOR RELIEF FROM NONDISPOSITIVE PRETRIAL ORDER OF MAGISTRATE JUDGE [Re: ECF No. 652] 12 Plaintiff VLSI Technology, LLC (“VLSI”) filed a Motion for Relief from Magistrate Judge 13 14 Nathanael M. Cousins’ Nondispositive Pretrial Order (ECF No. 604 (“Order”)), which struck two 15 of VLSI damages expert Dr. Ryan Sullivan’s theories on the grounds that VLSI did not disclose 16 them in its damages contentions. ECF No. 652 (“Mot.”). VLSI asks this Court to reverse Judge 17 Cousins’ Order on the grounds that it “overlooked that VLSI . . . disclosed and explained both of 18 Dr. Sullivan’s theories, but used slightly different labels to do so.” Mot. at 1. VLSI’s motion is DENIED for the reasons described below. 19 20 21 I. BACKGROUND VLSI accuses Intel Corporation’s (“Intel”) Turbo Boost Max Technology 3.0 (“TBMT”) 22 feature of infringing U.S. Patent No. 8,566,836 (the “’836 Patent”). On May 16, 2023, Intel 23 moved to strike, inter alia, two of VLSI damages expert Dr. Ryan Sullivan’s ’836 Patent damages 24 theories – Value Per Unit (“VPU”) and Net Present Value (“NPV”) – on the grounds that VLSI 25 failed to disclose either theory in its Fifth Supplemental Damages Contentions (ECF No. 476-1, 26 (“FSDC”)). ECF No. 473. Judge Cousins ordered additional briefing on the motion, which the 27 parties provided. ECF Nos. 502, 507. On August 30, 2023, Judge Cousins issued an order 28 granting Intel’s motion to strike the VPU and NPV damages theories. Order at 8. Pursuant to Dockets.Justia.com 1 Federal Rule of Civil Procedure 72 and Civil Local Rule 72-2, VLSI filed an objection to the 2 Order (Mot.) and, pursuant to the Court’s briefing schedule (ECF No. 655), Intel responded. ECF 3 No. 699 (“Opp.”). 4 II. Pretrial orders issued by a Magistrate Judge may be reversed only if they contain “clear 5 United States District Court Northern District of California LEGAL STANDARD 6 error.” Grimes v. City & Cnty. of San Francisco, 951 F.2d 236, 241 (9th Cir. 1991). 7 III. DISCUSSION Judge Cousins’ Findings 8 A. 9 VLSI argues that the following formula disclosed in its FSDC provides the basis for both 10 its NPV and VPU damages theories. Mot. at 1–2 (citing FSDC at 99). VLSI asserted in its 11 briefing to Judge Cousins that “the NPV and VPU values” are the economic value parameter used 12 in the formula, and that both “derive from two Intel documents – 89699DOC01565734 and 13 93000DOC03579403.” Order at 7 (citing ECF No. 502 at 8). 14 15 16 17 Judge Cousins first found that the FSDC properly disclosed that “experts may rely on 18 ‘Intel data and testimony.’” Order at 6 (quoting FSDC at 82). Judge Cousins then addressed the 19 two documents put forth by VLSI to determine if they disclosed the VPU and NPV theories. 20 Judge Cousins determined that the first document, 89699DOC01565734, was not properly 21 disclosed. He noted that the document was cited three times in the FSDC. Id. He found that the 22 first two references appear in VLSI’s description of the technical benefits of the ’836 Patent. Id. 23 (citing FSDC at 49, 57). He then found that the third reference appears in a separate section 24 describing the costs associated with implementing the accused features, as opposed to the value 25 the technology brings to Intel. Id.; compare FSDC at 101 (discussing costs associated with the 26 accused technology) with ECF No. 476-3 (“Sullivan Report”) ¶ 408 (“Intel anticipated TBMT 3.0 27 to generate $345 million in net present value (“NPV”) for desktop (“DT”) and mobile (“MB”) 28 products”). Due to the disparate placement of such references, Judge Cousins concluded that it 2 1 would be unreasonable for Intel to infer that VLSI would implement the computations to 2 demonstrate economic value. Id. The Court finds no clear error in Judge Cousins’ finding regarding document 3 4 89699DOC01565734. The three citations to 89699DOC01565734 in the FSDC pertain to 5 technical specifications or costs and have nothing to do with VPU or NPV damages, much less 6 economic value of any kind. See FSDC at 49 (“Intel also ran a test showing ”) (citing 89699DOC01565734); id. at 57 7 8 (“VLSI also expects that its experts will analyze the recently-produced data illustrating Intel’s 9 testing of the accused features.”) (citing 89699DOC01565734); id. at 102 (“Another document 10 indicates that United States District Court Northern District of California 11 ”) (citing 89699DOC01565734). 12 Judge Cousins found that the second document, 93000DOC03579403, “suffers from 13 14 similar infirmities.” Order at 7. He specifically noted that, “[f]or example, VLSI points to one 15 citation among over ten pages of string citations” (id. (citing FSDC at 85)) and concluded that 16 “[s]uch vague and imprecise citations to internal documents and analyses does not give Intel 17 notice of VLSI’s theory and promotes the ‘type of inferential guesswork . . . [the] damages 18 contentions are intended to avoid.’” Id. (quoting Looksmart Grp., Inc. v. Microsoft Corp., 386 F. 19 Supp. 3d 1222, 1234 (N.D. Cal. 2019). The Court disagrees with Judge Cousins’ finding that the second document, 20 21 93000DOC03579403, was not properly disclosed. But as discussed below, this disagreement does 22 not change the outcome. While, as Judge Cousins notes, one citation to 93000DOC03579403 is in 23 a nearly 14-page string cite, the document is cited eight other times throughout the FSDC. See 24 FSDC at 49, 83, 84, 98, 102, 167. Some of these citations correspond to technical information, 25 but three citations specifically refer to economic assessments that related to economic value. See 26 FSDC at 49 (“Intel noted that 27 ‘ 28 93000DOC03579403); id. at 83 (“For example, one Intel document indicates , and that ’”) (quoting 3 1 2 ”) (quoting 93000DOC03579403–04); id. at 84 (“Intel’s internal documents relating to marketing and pricing strategy demonstrate 3 , including Turbo Boost Max Technology 3.0 (which is accused of infringing the ’836 4 .”) (citing, inter alia, 5 Patent), 6 93000DOC03579403) (emphasis added). The Court concludes that these three citations constitute 7 a sufficient disclosure that TBMT could be linked to damages theories including, for example, an 8 United States District Court Northern District of California 9 Judge Cousins found that because these two documents were not properly cited, “VLSI 10 does not disclose either the NPV or VPU as theories of recovery in its Contentions.” Order at 7. 11 Judge Cousins also addressed Intel’s argument that VLSI did not properly disclose 12 underlying data for Dr. Sullivan’s VPU and NPV theories. Intel argued in its discovery letter to 13 Judge Cousins that “Sullivan relies on twelve Intel documents ([Sullivan Report] ¶¶ 408-09, 414, 14 417, 428, 429, 430) for the inputs to his calculation, but VLSI did not disclose using a single one 15 in its damages calculation.” ECF No. 473. Instead, Intel argued, “[VLSI] buried four of them in 16 string cites among hundreds of other documents and did not cite eight of them at all.” Id. VLSI 17 responded in its supplemental briefing to Judge Cousins that it properly “disclose[d] eight of 18 twelve Intel documents Dr. Sullivan supposedly relies on for his damages opinion. Two of these 19 eight documents are duplicates of documents cited in the contentions, and Dr. Sullivan uses them 20 merely to provide background for his analysis.” ECF No. 502 at 8. Judge Cousins agreed with 21 Intel, and found that VLSI’s “scattershot references to Intel data or documents do not support 22 Sullivan’s application of the NPV or VPU calculations.” Order at 6 (emphasis added). 23 The Court reviews Judge Cousins’ Order for clear error. 24 B. 25 VLSI argues that Dr. Sullivan’s VPU theory is “based on Intel’s anticipated ‘sell-up’ Value Per Unit (VPU) Data Was Not Properly Disclosed 26 benefit of TBMT.” Mot. at 3. Specifically, Dr. Sullivan opines in his report that adding TMBT 27 would “result in an 28 ” in a “per-unit reasonable royalty calculation.” Id. (citing Sullivan Report 4 1 ¶¶ 428–29). Intel takes issue first with VLSI’s use of the terms “sell-up” and “upsell” and second 2 with the source of the First, VLSI argues that the terms “sell-up” and “upsell” fairly disclose a VPU damages 3 4 theory. VLSI argues that it “repeatedly disclosed that TBMT enables Intel to charge a price 5 premium for products that have TBMT, and thereby provides ‘sell-up’ and ‘up sell’ benefits.” 6 Mot. at 3. Specifically, VLSI claims it disclosed that “Intel’s documentation estimates that 7 [TBMT] ‘ 8 84). 9 United States District Court Northern District of California numbers. Opp. at 3–4. .’” Id. (quoting FSDC at Intel responds that VLSI never argued to Judge Cousins that “it referred to Dr. Sullivan’s 10 methodologies as a ‘sell up’” and has thus waived it. Opp. at 1. Intel also argues that “VLSI’s 11 contentions refer to a ‘sell up’ just one single time, in a section describing alleged technical 12 benefits of TBMT.” Id. at 4 (citing FSDC at 50:3–12) (emphasis in original). 13 The Court agrees with VLSI. First, the Court finds no functional distinction in the 14 meaning of the terms “upsell,” “sell up,” increase in “average sale price” (“ASP”), and increase in 15 “value per unit.” These terms all stand for a simple damages principle: an increase in the sale 16 price of a unit. The Court finds that VLSI did not waive this argument because it addressed 17 disclosure of increases in ASP in its supplemental briefing to Judge Cousins. ECF No. 502 at 8 18 (citing FSDC at 82). The Court also disagrees with Intel’s claim that “upsell” and “sell-up” are 19 only referred to in a technical context. The FSDC clearly disclosed the 20 in an economic context. See FSDC at 83 (“For example, one Intel document indicates an 21 ”) (citing 93000DOC03579403–04); id. at 84. 22 Second, VLSI disagrees with Judge Cousins’ determination that it “provided only 23 ‘scattershot references’ to underlying documents, which ‘do not support Sullivan’s application of 24 the NPV or VPU calculations.’” Mot. at 1 (quoting Order at 6). VLSI cites to its disclosure of the 25 upsell, and “several additional documents” cited in the FSDC, then claims that the documents 26 “discuss these same benefits, each of which were also discussed in Dr. Sullivan’s report, or are 27 substantively identical to documents discussed in Dr. Sullivan’s report.” Id. at 4. 28 Intel responds that VLSI did not “disclose it would use the 5 sales numbers” 1 cited in paragraphs 428–430 of the Sullivan Report and that it therefore “had no way to know from 2 VLSI’s contentions that Dr. Sullivan would get to a damages number using an 3 increase from Intel’s documents or a VPU calculation.” Opp. at 3 The Court agrees with Intel. VLSI explains that Dr. Sullivan’s VPU theory is based on 4 5 data that TBMT would “result in .” Mot. at 3. But VLSI does not address disclosure of 6 7 those in the FSDC. Even if VLSI properly disclosed a VPU theory in the context of a , Dr. Sullivan does not utilize the 8 9 figure in his damages opinions. VLSI failed to disclose underlying data for a VPU damages calculation based on the sales increases which were clearly identified in documents in existence at the time of 10 United States District Court Northern District of California sales 11 filing damages contentions. Since VLSI does not squarely address this disclosure, the Court finds 12 no clear error in Judge Cousins’ determination. Having found no clear error in Judge Cousins’ determination that VLSI did not properly 13 14 disclose the data underlying Dr. Sullivan’s VPU theory in the FSDC, the Court DENIES VLSI’s 15 Motion for Relief as to the VPU theory. 16 C. 17 VLSI argues that the FSDC discloses the documents Dr. Sullivan used for his NPV theory. Net Present Value (NPV) Theory and Data Were Not Properly Disclosed 18 Mot. at 5 (citing Sullivan Report at ¶¶ 413–419). First, VLSI asserts that an FSDC citation to an 19 email describing TBMT as a “ 20 Cousins “appears to have overlooked” the email. Mot. at 5 (citing 93000DOC02370250). 21 Second, VLSI argues that it “cited at least four separate versions of the specific NPV documents in 22 VLSI’s discussions of the ’836 Patent’s technical value and benefits.” Id. ” disclosed the NPV theory, but that Judge Intel responds to both arguments. First, Intel argues that Dr. Sullivan does not purport to 23 24 use the figure from 93000DOC02370250 for any part of or input to his NPV 25 computation. Opp. at 5 (citing Sullivan Report at ¶¶ 413–427). Intel adds that VLSI’s contentions 26 cite the document only in a section addressing purported technical benefits, which is not sufficient 27 to disclose a NPV theory. Id. (citing FSDC at 50). Second, Intel argues that “VLSI did not 28 disclose in its contentions that any of [the NPV documents have] anything to do with NPV or a 6 1 damages computation” but instead “cited the documents only as relating to issues such as 2 performance benefits, testing, or costs associated with the accused feature.” Id. (citing FSDC at 3 49:8–16, 56:20–58:9, 101:26–102:6, 128:16–139:19). United States District Court Northern District of California 4 The Court finds no clear error in Judge Cousins’ exclusion of the NPV theory. First, Judge 5 Cousins hardly “overlooked” the email; VLSI’s briefing never directed Judge Cousins to the 6 document. VLSI claimed instead that the two documents Judge Cousins did review 7 (89699DOC01565734 and 93000DOC03579403) were the “two specific Intel documents that 8 VLSI cited throughout its contentions” that disclose VPU and NPV. ECF No. 502 at 8. Despite 9 this, VLSI did not cite either the quote, the dollar figure, or even the page number from the FSDC 10 that contained the citation (FSDC at 50) in its original briefing to Judge Cousins. A court cannot 11 be expected to find a single sentence and citation buried in a 226-page document without direction 12 from the parties’ briefing. 13 Even if VLSI had properly made this argument to Judge Cousins, the quote does not 14 properly disclose the NPV theory. VLSI’s only basis for the NPV theory is the single quote from 15 a once-cited document claiming that TBMT represents a “ 16 FSDC at 50 (quoting 93000DOC02370250). A single email claiming a financial opportunity with 17 no other context hardly puts an opposing party on notice of a NPV damages theory. 18 ” for Intel. VLSI’s second argument that other documents disclose the NPV theory also fails. The 19 four new documents put forth by VLSI (Mot. at 5) are contained in a string cite in the FSDC 20 describing “the recently-produced data illustrating Intel’s testing of the accused features.” FSDC 21 at 57 (the fifth document listed is 89699DOC01565734, which Judge Cousins and this Court agree 22 did not properly disclose economic value related to damages theories). A label about recently 23 produced testing data in no way discloses any kind of damages theory, much less one related to 24 NPV. Therefore, the Court finds that Judge Cousins committed no clear error in striking the NPV 25 damages theory. 26 Having found no clear error in Judge Cousins’ determination that VLSI did not properly 27 disclose the data and theory underlying Dr. Sullivan’s NPV theory in the FSDC, the Court 28 DENIES VLSI’s Motion for Relief as to the NPV theory. 7 1 2 IV. ORDER For the foregoing reasons, IT IS HEREBY ORDERED that Plaintiff VLSI’s Motion for 3 Relief from Magistrate Judge Nathanael M. Cousins’ Nondispositive Pretrial Order (ECF No. 652) 4 is DENIED. 5 6 7 8 Dated: October 11, 2023 ______________________________________ BETH LABSON FREEMAN United States District Judge 9 10 United States District Court Northern District of California 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 8
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