NEC Corp. v. HYUNDAI ELECTRONICS INDUSTRIES CO., 30 F. Supp. 2d 561 (E.D. Va. 1998)

*562 *563 Michael S. Culver, Oliff and Berridge, Alexandria, VA, for Plaintiff.

Charles T. Armstrong, McGuire, Woods, Battle & Boothe, McLean, VA, for Defendant.

ELLIS, District Judge.

Twenty patents covering different semiconductor circuitry devices and fabrication processes are at issue in these consolidated patent infringement actions, twelve of which are asserted by NEC Corporation and eight of which are asserted by Hyundai Electronics Industries Co.^[1] Now before the Court is defendants' motion for summary judgment on the issue of infringement of NEC's U.S. Patent No. 4,322,825 (the '825 patent). The '825 patent, entitled "Flexible Hidden Refresh Memory Circuit," relates to a method for refreshing the values stored in the memory cells of Dynamic Random Access Memory devices (DRAMs). At issue are three "means plus function" limitations in claim 1 of the patent. Disposition of these motions requires claim construction under Markman v. Westview Instruments, Inc., 517 U.S. 370, 116 S. Ct. 1384, 134 L. Ed. 2d 577 (1996), which, in turn, leads to the conclusion that remaining disputed factual issues preclude summary judgment on the issue of infringement.

A DRAM is a basic type of memory chip that stores logic information in the form of binary digits, or "bits." A bit may have a *564 value of either "1" or "0." Each individual memory cell within a DRAM stores an electrical charge that determines the value of the bit. The cells are connected to the circuitry outside the memory array through a grid of electrical lines known as "bit lines" and "word lines," with each word line identified by a unique "row address" and each bit line identified by a unique "column address." An individual memory cell can be accessed by presenting the DRAM with the unique address combination corresponding to the cell's location.

Individual memory cells are selected by means of electrical signals generated outside the DRAM. In general, these externally-generated signals include the row address strobe (RAS*) and the column address strobe (CAS*). In normal DRAM operations, a memory cell is selected by (i) inputting a row address to the DRAM; (ii) activating the row address strobe, thus selecting the single word line corresponding to the row address; (iii) inputting a column address to the DRAM; and (iv) activating the column address strobe, thus selecting the single bit line corresponding to the column address.

Information in the form of electrical charge passes into and out of a selected memory cell through its corresponding bit line. During a "read" operation, the charge stored in the memory cell passes onto the bit line which carries it outside of the memory cell array to be read as either "1" (a high charge) or "0" (a low charge). In a "write" operation, an electrical signal from outside the memory array passes along the bit line to be stored in the memory cell as either a "1" or a "0." Whether an accessed cell is subjected to a read or write operation is generally determined by an externally-generated signal called "write enable" (WE*); if write enable is activated, a write operation will be completed, while a read operation will be completed if it is inactive.

DRAM memory cells can only store their charges for a finite period of time, and so these cells must have their values restored from time to time or the data stored within the memory cell may be corrupted. This operation is called "refresh." A refresh operation may be conducted in each memory cell in a given word line simultaneously. When a word line is selected through a read or write operation, the charge stored in each memory cell in the row passes to its attached bit line. A sense amplifier connected to each bit line detects whether a "1" or a "0" is stored in the particular memory cell. If the detected charge is a "1" (high), the sense amplifier operates to increase the charge stored on the memory cell capacitor to the originally stored value, while if the measured value is "0" (low), the sense amplifier causes electric charge on the memory cell capacitor to be decreased to the originally stored low value.

"Hidden" refresh allows the logic value stored in a particular memory cell to be presented and maintained at the DRAM's data output mechanism while simultaneously, all of the other memory cells in that row are accessed and refreshed. The data from the original read operation remains at the output terminal and available to the computer throughout the entire period. The operation is "hidden" in that it does not obviously interrupt the normal operation of the device.

The '825 patent was not the first device to accomplish hidden refresh. In hidden refresh devices that preceded the '825 patent, however, the "write enable" signal had to be inactive throughout the refresh operation or data at the output terminal might be corrupted. The '825 patent is designed to control the hidden refresh operation using only the row address strobe and the column address strobe, regardless of the presence or absence of any other inputs such as "write enable." Essentially, the '825 patent provides for circuitry that isolates the circuits at the output pin from the rest of the output-input circuitry after the initial read operation has taken place and before the refresh operation has begun. As a result, the data at the output terminal remains undisturbed while the memory cells are refreshed.

The invention is accomplished by manipulating the column address strobe, which in turn governs a control signal. The function of this control signal is to enable what is described in claim 1 of the '825 patent as a "digit control means for selectively deriving logic information from [the] digit lines based *565 on the incorporated column address information." Claim 1 of the '825 patent specifies a timing sequence which, in essence, requires that the control signal be (i) "set" at the time when data from the initial read operation becomes available; (ii) "reset" when that data is no longer available; and (ii) "suppressed" during subsequent cycles. Thus, when information is to be read to the output, a control signal produced by the DRAM's timing circuits turns on transistors that complete the connection between the output amplifier and the output circuitry. After the initial read operation, the control signal is turned off ("reset"), disabling the transistors and isolating the output circuitry from the rest of the data path. Since this control signal is suppressed during the hidden refresh operation, the output pin remains isolated and the data on the output pin remain valid throughout the refresh operation.

NEC claims that certain Hyundai memory devices infringe claim 1 of the '825 patent. Hyundai denies its devices infringe the '825 patent either literally or equivalently. Central to the disposition of this dispute is the construction of three "means plus function" limitations within claim 1:

(1) "digit control means for selectively deriving logic information from said digit lines based on the incorporated column address information" (the "digit control means");

(2) "timing means for generating a control signal for enabling said digit control means, said timing means setting said control signal in response to the presence of said column address strobe signal following the presence of said row address strobe signal and resetting said control signal in response to the absence of said row strobe signal following the presence of said column strobe signal" (the "timing means");

(3) "suppress means for suppressing said control signal when said row strobe signal is set through its reset state within a set period of said column strobe signal" (the "suppress means").

These three limitations are disputed not because of any disagreement between the parties as to the structures referenced by this language, but because of the parties' sharply diverging constructions of "control signal for enabling the digit control means," a term upon which the latter two limitations depend and which itself depends upon the proper construction of the "digit control means" limitation. .

Infringement analysis involves a two-step determination: first, the proper construction of the asserted claim and then a determination whether the claim, as properly construed, reads on the accused product or method. Claim construction is a question of law. Markman v. Westview Instruments, Inc., 52 F.3d 967, 976 (Fed.Cir.1995) (en banc), aff'd, 517 U.S. 370, 116 S. Ct. 1384, 134 L. Ed. 2d 577 (1996). A product infringes a claim in a patent if every element of the invention, as set out in the claim, can be found in the product literally or by substantial equivalent. Thus, as a prerequisite to any infringement determination, it is necessary to construe the elements of claim 1.

When construing a claim, a court principally consults the evidence intrinsic to the patent: namely, the claims themselves, the written description portion of the specification, and the prosecution history of the patent. See Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582-83 (Fed.Cir.1996). Extrinsic evidence, which consists of material outside the patent and its file history and includes expert testimony, dictionaries, learned treatises, and the like, may be considered only "for the court's understanding of the patent, not for the purpose of varying or contradicting the terms of the claims." Markman, 52 F.3d at 981.

Because the claims define the invention,^[2] the analysis of the intrinsic evidence focuses first on the words of the claims themselves, giving the claim terms their "ordinary and customary meaning." Vitronics, 90 F.3d at 1582. A term should not be interpreted contrary to its customary meaning unless the specification clearly explains this special definition. Id; Markman, 52 F.3d at 979 ("For *566 claim construction purposes, the description may act as a sort of dictionary, which explains the invention and may define terms used in the claims."). Nevertheless, a patentee may choose to be his or her own lexicographer and use terms in a manner other than their ordinary meaning provided that the patent specification or file history clearly discloses any such special or alternative meaning. Vitronics, 90 F.3d at 1582; Beachcombers v. WildeWood Creative Prods., Inc., 31 F.3d 1154, 1158 (Fed.Cir.1994).

In the event the claim language alone is not dispositive, analysis should focus next on the specification of the patent, which is highly relevant to the claim interpretation process and is, in fact, "the single best guide to the meaning of a disputed [claim]." Vitronics, 90 F.3d at 1582; see also Gentry Gallery, Inc. v. Berkline Corp., 134 F.3d 1473, 1478-80 (Fed.Cir.1998). It follows that a proposed claim interpretation that excludes the preferred embodiment would rarely, if ever, be correct. Vitronics, 90 F.3d at 1583.

The patent's prosecution history or "file wrapper" may also aid in proper claim construction. Statements made in the course of a patent's prosecution may shine a bright light on the scope and meaning of the claims. Thus, courts have "broad power to look as a matter of law to the prosecution history of the patent in order to ascertain the true meaning of language used in the patent claims," since this history may demonstrate the patentee's understanding of the relevant terms at the time of application. Markman, 52 F.3d at 980; see also Vitronics, 90 F.3d at 1582-83.

In those relatively unusual instances where the intrinsic evidence (i.e., the claims, the specification, and the prosecution history) is not sufficient to resolve ambiguity in claim language, courts may resort to extrinsic evidence, including expert testimony, to resolve the dispute.^[3]Vitronics, 90 F.3d at 1583; Hormone Research Found., Inc. v. Genentech, Inc., 904 F.2d 1558, 1562 (Fed.Cir.1990).

Construction of a "means plus function" claim is limited by the express statutory language of 35 U.S.C. § 112 ¶ 6, which provides that "an element ... may be expressed as a means or step for performing a specified function without the recital of structure, material or acts in support thereof." Pursuant to § 112, the court must construe the limitation to encompass the "structure, material or acts described in the specification and equivalents thereof." Sofamor Danek Group, Inc. v. DePuy-Motech, Inc., 74 F.3d 1216, 1220 (Fed.Cir.1996). Thus, the "means" in a "means plus function" claim element is a "a generic reference for the corresponding structure disclosed in the specification." Chiuminatta Concrete Concepts v. Cardinal Indus., 145 F.3d 1303 (Fed. Cir.1998). Determination of corresponding structure is "a matter of claim construction," and thus a question of law for the court, as is the definition of the function, which is "a matter of construction of specific terms in the claim." Id. (citing B. Braun Med., Inc. v. Abbott Labs., 124 F.3d 1419, 1425-25 (Fed. Cir.1997)). Importantly, the "structure disclosed in the specification pursuant to § 112 ¶ 6 is `corresponding' structure only if the specification or file history clearly links or associates that structure to the function recited in the claim." B. Braun Med., Inc., 124 F.3d at 1424.

The general principles of claim construction govern the proper interpretation of claim 1's three "means plus function" elements, and each is separately discussed below.

Under Chiuminatta, 145 F.3d at 1307-08, construction of a "means plus function" element requires identification of the corresponding function and structure disclosed by the specification. The function of the digit control means is expressly defined in claim 1 as "selectively deriving logic information from said digit lines based on the incorporated column address information." Thus, the structure that corresponds to this means-plus-function element consists of all components required to perform the stated *567 function. The parties agree that the structure required to perform this function is that structure depicted in Figure 5 of the '825 patent,^[4] consisting of the column decoders (boxes 55 and 56), an output amplifier (box 58), and a latch control circuit (box 59), or the equivalent of such structure.

Thus, the "digit control means" element in claim 1 is defined as that structure depicted in Figure 5 of the '825 patent consisting of the column decoders (boxes 55 and 56), an output amplifier (box 58), and a latch control circuit (box 59), or the equivalent of such structure, the elements of which together perform the function of selectively deriving logic information from said digit control lines based on the incorporated column address information.

The parties agree that the structure required to set the control signal in response to the presence of a column address strobe signal that follows the presence of a row strobe signal and to reset the control signal in response to the absence of the row address strobe signal following the presence of the column address strobe signal is that structure depicted in Figure 5 of the '825 patent as box 60. The structure is also depicted in Figure 11 as the circuitry within the hatched box I3' consisting of transistors Q73, Q72, and Q71, and excluding the remainder.^[5] Finally, it is depicted in Figure 14 as the circuitry within the hatched box I3' with the exception of transistors Q74, Q75, Q76, and Q77.^[6] Thus, this structure and any equivalent of this structure that performs the specified function fall within the scope of claim 1.

Put another way, the "timing means" element in claim 1 is defined as that structure depicted in Figure 5 as box 60 or that structure depicted in Figure 11 as the circuitry within the hatched box I3' consisting of transistors Q73, Q72, and Q71, and excluding the remainder, or that structure depicted in Figure 14 as the circuitry within the hatched box I3' with the exception of transistors Q74, Q75, Q76, and Q77, or any equivalent of these structures, which generates a control signal for enabling the digit control means and which sets this control signal in response to the presence of a specified column address signal following the presence of a specified row address strobe signal and resets the control signal in response to the absence of this row strobe signal following the presence of the column strobe signal.

NEC and Hyundai both define the structure that suppresses the control signal when the row strobe signal is set through its reset state within a set period of the column strobe signal as that structure depicted within the hatched box I3' in Figure 14 of the '825 patent which includes transistors Q74, Q75, Q76 , and Q77. That structure is also depicted in Figure 11 within the hatched box I3' and includes transistors Q74, Q75, and Q76. Thus, this structure and any equivalent of this structure which performs the specified function fall within the scope of claim 1.

In other words, the "suppress means" element in claim 1 is defined as that structure depicted within the hatched box I3' in Figure 14 which includes transistors Q74, Q75, Q76, and Q77 or that structure depicted within the hatched box I3' in Figure 11 which includes transistors Q74, Q75, and Q76, or any equivalent of these structures, which suppresses the control signal when the row strobe signal is set through its reset state within a set period of the column strobe signal.

The only real disagreement between the parties centers upon proper construction of the control signal that enables the digit control means. Hyundai and NEC agree that the control signal is that signal represented as RE' in Figure 5 of the '825 patent. They disagree, however, as to whether the control signal specified in claim 1 necessarily enables the whole of the digit control means, or merely critical elements of the digit control *568 means. In particular, Hyundai contends that since the control signal RE' is shown as an input to both the column decoder and the latch control circuit of the digit control means in the embodiments of the '825 patent, a signal that merely enables the latch control circuit a single element of the digit control means is not included under the language of the patent. NEC responds that Hyundai is attempting to import the specification into the claim, thus narrowing the claim inappropriately, and that the objective of the patent is achieved if the control signal simply enables the latch control circuit, which NEC describes as the relevant portion of the digit control means, in that the latch control circuit permits data at the output pin to be isolated during hidden refresh.

The usual meaning of enable is to empower, or in the case of mechanical devices, to turn on. While a dictionary definition of a term is not dispositive of that term's meaning in a technological context, if nothing in the context of the inventor's use of the term suggests a specialized or unusual import, the term should be interpreted according to its usual and customary meaning. See Anderson v. Int'l Eng'g and Mfg., Inc., No. 98-1062, 160 F.3d 1345, 1998 WL 770652, at *3 (Fed.Cir. Nov.2, 1998); Vitronics, 90 F.3d at 1582. In this instance, no such context leads away from the everyday meaning of the word "enable." Thus, the patent seems to require that the control signal turn the digit control means on and off, rather than merely creating and breaking the data chain from the sense amplifiers to the input/output line by enabling and disabling the latch control circuit. This conclusion is supported by the language of the patent's summary of the invention, which emphasizes that during the refresh operation "all the active operations based on active level of CAS/ are inhibited." RE', the control signal, is a derivative of CAS/, the column address strobe; if the patent requires that all operations based on the active level of the column address strobe be inhibited during the refresh operation, this suggests that the control signal must disable, or turn off, the entire digit control means, in that the entire digit control means is activated in the presence of an active level of CAS/. This language in the summary of the invention is consistent with language describing the function of the invention throughout the patent. Thus the control signal that enables the digit control means must be understood as the control signal that empowers or turns on the digit control means.

Given these conclusions concerning the scope of the disputed claims of the '825 patent, questions of infringement must be deferred until trial as issues of disputed fact remain. Accordingly, the motion for summary judgment is denied.

The Clerk is directed to send copies of this Memorandum Opinion to all counsel of record.

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[1] NEC Corporation and Hyundai Electronics Industries Co. are the plaintiff-patentees in these actions. The allegedly infringing defendants are Hyundai Electronics Industries Co. and Hyundai Electronics America, Inc. (hereinafter collectively referred to as Hyundai) with respect to the NEC patents and NEC Corporation and NEC Electronics, Inc. (hereinafter collectively referred to as NEC) with respect to the Hyundai patents.

[2] See Constant v. Advanced Micro-Devices, Inc., 848 F.2d 1560, 1571 (Fed.Cir.1988).

[3] Of course, courts may use extrinsic evidence such as technical treatises and dictionaries in any event to elucidate the general technology. See Vitronics, 90 F.3d at 1584 n. 6.

[4] Figure 5 of the '825 patent may be found at Appendix 1 to this opinion.

[5] Figure 11 of the '825 patent may be found at Appendix 2 to this opinion.

[6] Figure 14 of the '825 patent may be found at Appendix 3 to this opinion.