Polaris Innovations Ltd. v. Brent, No. 19-1483 (Fed. Cir. 2022)
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Polaris’s 993 patent, titled “Control Component for Controlling a Semiconductor Memory Component in a Semiconductor Memory Module,” explains that the control component can send both address signals and control signals through the same leads, allowing the control component to perform its functions with fewer leads. Its 505 patent involves a shared-resource system in which logical controls are used to manage resource requests.
In inter partes review (IPR) proceedings, the Patent Trial and Appeal Board determined that all challenged claims are unpatentable. The Federal Circuit affirmed. Because the Board decided the merits before Polaris filed its motion to terminate the IPR Polaris’s motion was untimely. The Board properly exercised its discretion. The court rejected Polaris’s argument that the Board misconstrued the claim terms “memory chips” and “semiconductor memory component” within the claim phrase “wherein the semiconductor memory component comprises a plurality of memory chips.” Prior art discloses all claim limitations under the Board’s claim constructions. The Board correctly adopted Polaris’s expert’s definition of “single buffer” as the broadest reasonable interpretation consistent with the specification, which discloses that resource tags "may be located in disparate locations." Substantial evidence supports a finding that the prior art discloses a “resource tag buffer.”
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