Zions Bancorporation v. U.S. Ethernet Innovations LLC
Filing
133
SECOND CLAIM CONSTRUCTION ORDER. Signed by Judge James Ware on August 29, 2012. (wsn, COURT STAFF) (Filed on 8/29/2012)
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IN THE UNITED STATES DISTRICT COURT
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FOR THE NORTHERN DISTRICT OF CALIFORNIA
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SAN FRANCISCO DIVISION
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U.S. Ethernet Innovations, LLC,
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For the Northern District of California
United States District Court
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Plaintiff,
SECOND CLAIM CONSTRUCTION
ORDER
v.
Acer, Inc., et al.,
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NO. C 10-03724 JW
NO. C 10-05254 JW
NO. C 10-03481 JW
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AT&T, Inc., et al.,
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Defendants.
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Zions Bancorporation, et al.,
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Plaintiffs,
v.
U.S. Ethernet Innovations, LLC,
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Defendant.
/
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I. INTRODUCTION
On January 31, 2012, the Court issued its First Claim Construction Order1 construing the
disputed terms from the Patents-in-Suit2 that the parties identified as significant to resolving these
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(Docket Item No. 586 in No. C 10-03724 JW.)
The Patents-in-Suit are: U.S. Patent Nos. 5,307,459 (the “‘459 Patent”); 4,434,872 (the
“‘872 Patent”); 5,732,094 (the “‘094 Patent”); and 5,299,313 (the “‘313 Patent”) (collectively, the
“Patents-in-Suit”).
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related cases. In its First Claim Construction Order, the Court directed the parties to file
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simultaneous supplemental briefs addressing certain terms that were not construed.
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On May 3, 2012, the Court conducted its second Markman hearing. The parties have
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tendered for construction three terms relating to the word “task,” six means-plus-function terms and
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ten terms relating to the word “logic.” For continuity, the Court groups the terms in three categories
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and addresses them in order.
II. DISCUSSION
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A.
Limitations that Use the Word “Task”
Claim 1 of the ‘094 Patent claims:3
A method for transmitting a frame of data from a host system through a
network interface device to a network, comprising:
executing a frame transfer task initiated in the host system to transfer
a frame to a buffer memory in the network interface device; and
executing a frame transmission task in the network interface device to
initiate transmission of the frame from the buffer memory to the network in
parallel with the frame transfer task before the frame is completely
transferred to the buffer memory.
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For the Northern District of California
United States District Court
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Claim 39 of the ‘094 Patent claims:
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A method for transmitting a frame of data from a host system through a network
interface device to a network, comprising:
initiating a frame transfer task in the host system to transfer a frame to a
buffer memory in the network interface device;
monitoring the frame transfer task in the network interface device; and
executing a medium access task in the network interface device to initiate
access to the network, and upon access transmitting the frame from the buffer
memory to the network in parallel with the frame transfer task before the frame is
completely transferred to the buffer memory.
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1.
“task”
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The word “task” is a broad term, generally understood to mean any undertaking or piece of
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work.4 In its First Claim Construction Order, the Court found that the inventors’ failure to define or
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discuss in the words and phrases that include the word “task” arguably rendered the Claims invalid.
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Unless otherwise indicated, all bold typeface is added by the Court for emphasis.
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See, e.g., WEBSTER’S NEW TWENTIETH CENTURY DICTIONARY 1867 (2d ed. 1983).
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(See First Claim Construction Order at 19-20.) In their supplemental briefing, the parties request
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that the Court reconsider this finding.
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In a section entitled, “Description of the Related Art,” the inventors state:
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Data communications systems are often based on the transmission of packets or frames of
data that are composed by a sender. The packets or frames of data are designed to be
compatible with the network protocol involved with the communications system. Thus, the
sending system must compose the frames of data according to the network protocol prior to
initiation of transmission of data. Often, a sending system will wait for acknowledgment
[sic] that a frame of data sent to a network adapter has been transmitted prior to performing
a subsequent task, such as composing a second frame of data to be transmitted.
***
Although transmit data buffers enable a sending system to compose and download a
frame into the transmit data buffer, that then attend to other tasks while the network
adapter attempts to transmit the frame, it suffers the disadvantage that transmission of
a frame is delayed until the entire frame has been downloaded into the buffer. Thus
transmit data buffer type systems improve host system efficiency at the expense of
network throughput. Operations which are communication intensive suffer a
performance downgrade.
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For the Northern District of California
United States District Court
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(‘094 Patent, Col. 1:23-59.)
Upon reconsideration, the Court finds that a person of ordinary skill in the art would
understand that the inventors use the word “task” to mean:
A process5 that a sending system or an interface between the sending system and
a network performs to compose or operate on a frame of data.
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The Court turns to the particular “tasks” disclosed in the Claims of the ‘094 Patent.
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2.
“frame transfer task”
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Claim 1 of the ‘094 Patent claims:
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A method for transmitting a frame of data from a host system through a
network interface device to a network, comprising:
executing a frame transfer task initiated in the host system to transfer
a frame to a buffer memory in the network interface device . . .
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The phrase “frame transfer task” is not expressly defined in Claim 1, nor is it specifically
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discussed in the written description. However, Claim 1 recites limitations on a “frame transfer
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task.” According to the Claim, the “frame transfer task” must be initiated “in the host system.” In
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In each of the “task” phrases discussed below, the Court does not reach the issue of whether
the lack of disclosure of what “process” qualifies as a “task” affects the validity of the Claim under
the enablement requirement.
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addition, the “frame transfer task” must be performed to carry out a specific function, namely, “to
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transfer a frame to a buffer memory.”
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In the written description, the inventors discuss an embodiment as follows:
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In operation, the host computer composes a frame of data to be transmitted on the
network medium 42. The host computer 30 then identifies that frame through the
host interface 31. The host interface coupled with the identifiers of the frame move
data from the host computer 30 into the buffer 34 according to the description of the
frame. The threshold logic 36 monitors the transfer of data into the buffer 34.
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(‘094 Patent, Col. 4:52-59.)
“frame transfer task.”6 In response to the Examiner’s request for clarification, the inventors wrote:
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“the frame transfer task includes composing an identifier for the frame to be transferred in the host,
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For the Northern District of California
During the prosecution of what was allowed as Claim 1, the inventors discussed the phrase
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United States District Court
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loading the identifier in the network adapter, and then in response to the identifier, using resources
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on the adapter card to control movement of the data into the buffer memory.”7 The process of
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“composing an identifier for the frame,” “loading the identifier in the network adapter,” and
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controlling “movement of the data into the buffer memory” are consistent with the Court’s general
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definition of a “task.” Further, the Court does not find that the tasks enumerated for the Examiner
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are exclusive.
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Accordingly, the Court construes the phrase “frame transfer task” to mean:
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A process initiated by the host system to compose a frame of data or to perform
other operations on or with respect to the frame in order to transfer the frame to
the buffer memory in the network interface device.
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3.
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Claim 1 of the ‘094 Patent claims:
“frame transmission task”
A method for transmitting a frame of data from a host system through a
network interface device to a network, comprising:
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The Court considers the prosecution history, insofar as the Federal Circuit has instructed
that courts, when doing claim construction, “should also consider the patent’s prosecution history, if
it is in evidence.” See, e.g., Phillips v. AWH Corp., 415 F.3d 1303, 1317 (Fed. Cir. 2005) (citations
omitted).
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Response to Office Action dated April 7, 1997 at 5.
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executing a frame transfer task initiated in the host system to transfer a
frame to a buffer memory in the network interface device; and
executing a frame transmission task in the network interface device
to initiate transmission of the frame from the buffer memory to the network in
parallel with the frame transfer task before the frame is completely transferred
to the buffer memory.
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As is the case with “frame transfer task,” the phrase “frame transmission task” is not
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expressly defined in the claim, nor is it specifically discussed in the written description.
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According to the claim language, a “frame transmission task” must be performed “in” the
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network interface device. It must be performed for a specific function, namely, “to initiate
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transmission of the frame from the buffer memory to the network in parallel with the frame transfer
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task.”8 Finally, the task must be performed in a specific sequence: “before the frame is completely
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transmission.”
For the Northern District of California
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transferred to the buffer memory.” For convenience, the Court will refer to this sequence as “early
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Although they are not specifically called “tasks,” the written description describes processes
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that can be taken in the network interface device to initiate early transmission. For example,
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“processing a transmit descriptor”:
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According to another aspect of the present invention, the transmit buffer includes a
transmit descriptor ring, and a transmit data buffer. The host system composes a
frame by storing a transmit descriptor in the adapter managed transmit descriptor
ring. The transmit descriptor may remain resident in the transmit descriptor ring for
some time prior to an initiation of the data by the adapter, because of other transmit
descriptors being processed ahead of a current descriptor, or other reasons. When the
adapter begins processing of a transit descriptor, it retrieves immediate data from
the descriptor itself, and begins a download process into the transmit data buffer of
data identified in the descriptor. The threshold logic determines the amount of
immediate data from the descriptor, and monitors the downloading of data of the
frame into the download area. When the combination meets the threshold, then
actual transmission of the frame is initiated. Thus, transmission of a frame may be
initiated before the complete frame has been downloaded into the download area.
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(‘094 Patent, Col. 2:28-46.)
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The Court maintains the conclusion reached in its First Claim Construction Order that
because the limitation recites that the step is performed “to initiate transmission of the frame from
the buffer memory,” the task itself must be completed or at least started before the transmission is
begun.
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The “frame transmission task” limitation is further limited in dependent Claims 2, 3 and 4.
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The protocols and conditions disclosed in these dependent Claims are consistent with pre-
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transmission tasks performed on a frame.9
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Accordingly, the Court construes the phrase “frame transmission task” to mean:
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A process that is performed in the network interface device that initiates
transmission of the frame from the buffer memory to the network in parallel
with a frame transfer task and before the frame is completely transferred to the
buffer memory.
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4.
“medium access task”
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Claim 39 of the ‘094 Patent claims:
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A method for transmitting a frame of data from a host system through a network
interface device to a network, comprising:
initiating a frame transfer task in the host system to transfer a frame to a
buffer memory in the network interface device;
monitoring the frame transfer task in the network interface device; and
executing a medium access task in the network interface device to initiate
access to the network, and upon access transmitting the frame from the buffer
memory to the network in parallel with the frame transfer task before the frame is
completely transferred to the buffer memory.
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For the Northern District of California
United States District Court
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Like the other two “task” phrases, the phrase “medium access task” is not expressly defined
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in Claim 1 and is not specifically discussed in the written description.
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In the written description, the inventors discuss Figure 2, which is a functional block
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diagram. Figure 2 contains a block labeled “Network Medium”:
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FIG 2 illustrates the functional components of the early transmit system according to
the present invention.
***
The threshold logic makes the threshold determination and generates a signal as
indicated by line 38 to transmit logic 39 including, for instance, media access
control MAC logic 31.
***
In operation, the host computer composes a frame of date to be transmitted on the
network medium 42. The host computer 30 then identifies that frame through the
host interface 31. The host interface coupled with the identifiers of the frame move
data from the host computer 30 into the buffer 34 according to the description of the
frame. The threshold logic 36 monitors the transfer of data into the buffer 34. The
threshold logic 36 monitors the transfer of data into the buffer 34, then the transmit
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A dependent claim to Claim 1 must perform the function “to initiate [early] transmission.”
The Court leaves for later consideration the question of whether the dependent claims disclose tasks
that “initiate” early transmission.
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logic 39 is instructed to begin transmission of the frame. The transmit logic 39 then
begins retrieving data from buffer 34 to support transmission of the frame on the
medium 42.
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(‘094 Patent, Col. 4:16-59.)
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A person of ordinary skill in the art would understand that the inventors use the word
“medium” to refer to the carrier used by the network for transmitting data.
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Further, the language of Claim 39 recites that the “medium access task” must be executed in
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the network interface device and for a particular function, namely, “to initiate access to the
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network.”10
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Accordingly, the Court construes the phrase “medium access task” to mean:
A process that is performed in the network interface device that initiates access
to the network based on the particular carrier medium or media of the network.
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B.
For the Northern District of California
United States District Court
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Means-Plus-Function Terms
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The parties submit for construction six limitations that use a “means-plus-function” format.
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The parties agree that these limitations are to be governed by 35 U.S.C. § 112 ¶ 6, but they disagree
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as to the corresponding structures.
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“[S]tructure disclosed in the specification is ‘corresponding’ structure only if the
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specification or prosecution history clearly links or associates that structure to the function recited in
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the claim.” B. Braun Med., Inc. v. Abbott Labs., 124 F.3d 1419, 1424 (Fed. Cir. 1997). In other
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words, the structure must be necessary to perform the claimed function. See Northrop Grumman
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Corp. v. Intel Corp., 325 F.3d 1346, 1352 (Fed. Cir. 2003). The relevant structure is that which
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corresponds to the recited function. See Chiuminatta Concrete Concepts, Inc. v. Cardinal Indus.,
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Inc., 145 F.3d 1303, 1308-09 (Fed. Cir. 1998). Because the corresponding structure and its
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equivalent is limiting, any corresponding structure disclosed in the specification should be clearly
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identified. See Kahn v. General Motors Corp., 135 F.3d 1472, 1476 (Fed. Cir. 1998). However, the
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The remainder of the language of Claim 39 recites a “task” that must also be performed in
the network interface device, namely, “upon access transmitting the frame from the buffer memory
to the network in parallel with the frame transfer task before the frame is completely transferred to
the buffer memory.” However, because the task is performed “upon access,” it is not a task that
“initiates access” and is thus not a “medium access task.”
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written description need not explicitly describe the corresponding structure. See Atmel Corp. v.
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Info. Storage Devices, Inc., 198 F.3d 1374, 1381-82 (Fed. Cir. 1999). If the written description
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contains an implicit description that a person of ordinary skill in the art would recognize as
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performing the recited function, the statutory requirement is satisfied. Id.
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For the Northern District of California
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1.
“means for comparing the counter to the threshold value in the alterable storage
location and generating an indication signal to the host processor responsive to a
comparison of the counter and the alterable storage location”
Claim 1 of the ‘459 Patent claims:
An apparatus for transferring a data frame between a network
transceiver, coupled with a network, and a host system which includes
a host processor and host memory, the apparatus generating an
indication signal to the host processor responsive to the transfer of the
data frame, with the host processor responding to the indication signal
after a period of time, comprising:
a buffer memory for storing the data frame;
network interface logic for transferring the data frame between the network
transceiver and the buffer memory;
host interface logic for transferring the data frame between the host system
and the buffer memory;
threshold logic for allowing the period of time for the host processor to
respond to the indication signal to occur during the transferring of the data frame,
wherein the threshold logic includes,
a counter, coupled to the buffer memory, for counting the amount of
data transferred to or from the buffer memory;
an alterable storage location containing a threshold value; and
means for comparing the counter to the threshold value in the
alterable storage location and generating an indication signal to the host
processor responsive to a comparison of the counter and the alterable
storage location.
The “means for comparing” has two functions: (1) “comparing the counter to the threshold
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value in the alterable storage location”; and (2) “generating an indication signal to the host
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processor.” When dual functions must be performed by the “means,” the patent document must
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disclose either a single structure that performs both functions or multiple structures, each of which
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performs one of the functions, but the multiple structures reasonably may be grouped together as
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subcomponents of a larger component that performs both functions. See, e.g., Cardiac Pacemakers,
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Inc. v. St. Jude Med., Inc., No. IP 96-1718-C H/G, 2000 WL 1902191, at *3 (S.D. Ind. Dec. 19,
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2000). Ungrouped individual components of an apparatus, each of which performs only one of the
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functions, are not corresponding structure of a means that has dual functions.11 Id.
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As a preliminary matter, the Court observes that while the literal language of Claim 1 refers
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to the function as being “for comparing the counter to the threshold value in the alterable storage
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location,” the Court finds that the inventors meant “for comparing the value generated by the
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counter to the threshold value in the alterable storage location.” Correspondingly, although the
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Claim recites as a second function “generating an indication signal to the host processor responsive
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to a comparison of the counter and the alterable storage location,” the Court finds that the
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inventors meant “for generating an indication signal to the host processor responsive to a
comparison of the value generated by the counter and the value in the alterable storage location.”
a.
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For the Northern District of California
United States District Court
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“the counter”
Since both functions operate on a value generated by “the counter,” the Court construes what
the inventors meant by “the counter.”
An antecedent limitation of Claim 1 recites: “a counter coupled to the buffer memory, for
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counting the amount of data transferred to or from the buffer memory.” Thus, in order to serve as a
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“counter” on which the “means” operates, the counter must be a mechanism for counting the amount
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of data transferred to or from the buffer memory. The written description discloses at least two
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types of devices that “count” data:
b.
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“look-ahead threshold logic”
FIG. 12a graphically show when in the reception of the data frame the look-ahead
threshold logic will generate an early receive indication. As can be seen from FIG.
12a, look-ahead threshold logic determines how many bytes of frame has been
received before generating an early receive indication. The look-ahead threshold
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For example, if one individual component performs one of the dual functions and outputs a
signal to another individual component that performs the other function, this does not necessarily
mean that the two components reasonably may be grouped. However, if the two individual
components may reasonably be grouped as subcomponents on a larger individual component, the
larger component may serve as a corresponding structure because it would be capable of performing
both functions.
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logic contains an alterable storage location containing the look-ahead threshold number of
bytes to be received before generating the early indication signal.
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(‘459 Patent, Col. 29:59-67.)
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c.
“length-left threshold logic”
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For the Northern District of California
United States District Court
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Alternatively, the length-left threshold logic will generate an early indication signal
to the host depending upon how many bytes of the data frame remains [sic] to be
received. FIG. 12b graphically shows the relationship of the generation of the receive
complete signal relative to the reception of a data frame. While the look-ahead
threshold logic can be implemented by counting the number of bytes received in the
data frame and comparing it to a look-ahead threshold value, the length-left threshold
logic is more complex because the length of the data frame must be defined before
making comparisons to a threshold value. The length-left threshold logic must
determine the length of the data frame in order to determine if the length-left
threshold value has been reached on a real time basis for each data frame received.
(‘459 Patent, Col. 30:10-26.)
Although both types of logic count data, at this point the Court finds that only the look-ahead
threshold logic performs the function of counting the amount of data transferred.12
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d.
“for comparing [the value generated by] the counter to the
threshold value in the alterable storage location”
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Having determined the “counter” on which the means must operate, the Court proceeds to
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determine what structure or structures, if any, perform the function of comparing the value generated
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by the counter to the threshold value in the alterable storage location. The written description and
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the drawings contain multiple references to a functional components called a “comparator.” The
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Court finds that the block labeled 224 in Fig. 14 and 318 in Fig. 21 performs the function of
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comparing the first recited function.
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For example, Fig. 23 shows a comparator 341 that performs a comparison between a
“BYTES REMAIN” value and one of two threshold values, depending on whether the network
adapter is still receiving the frame that is being transferred. (‘459 Patent, Col. 37:59-38:8.) The
“BYTES REMAIN” value, as its name implies, represents the amount of data remaining to be
transferred, rather than “the amount of data transferred.” The Court invites the parties to submit
supplemental briefing with respect to whether any of these devices, some of which determine data
remaining to be transferred, perform the function of counting the amount of data transferred to or
from buffer memory.
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e.
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“for generating an indication signal to the host processor
responsive to a comparison of [the value generated by] the
counter and [the value in] the alterable storage location”
The second function that must be performed by the “means” is “generating an indication
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signal.” Neither of the structures found above by the Court that perform the “comparing” function
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can perform the “generating an indication signal” function.
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The Court finds that the functional components labeled “Interrupt Controller 60” shown in
signal” function. However, these components cannot perform the “comparing” function. Thus,
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there is no single structure that is capable of performing the dual functions of the “means.” In
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addition, the Court’s attention has not been drawn to any intrinsic evidence that would lead the
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For the Northern District of California
Fig. 4, together with “Early Rcv Control 225” in Fig. 14, perform the “generating an indication
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United States District Court
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Court to find that a person of ordinary skill in the art would group these individual functional
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components into a single component.
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Consequently, the Court declines to further construe Claim 1 of the ‘459 Patent and
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concludes that the lack of corresponding structure for the subject limitation renders Claim 1 arguably
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invalid. The Court invites the parties to address this matter in the course of further litigation in this
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case.
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2.
“means . . . for monitoring the transferring of data of a frame to the buffer
memory to make a threshold determination of an amount of data of the frame
transferred to the buffer memory”
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Claim 1 of the ‘872 Patent claims:
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For a system transmitting frames of data across a communications medium; an
apparatus comprising:
buffer memory for storing data of frames composed by the host computer for
transmission on the communications medium;
means, having a host system interface, for transferring data of frames to the
buffer memory;
means, coupled with the buffer memory, for monitoring the transferring
of data of a frame to the buffer memory to make a threshold determination of an
amount of data of the frame transferred to the buffer memory;
means, responsive to the threshold determination of the means for monitoring,
for initiating transmission of the frame prior to transfer of all the data of the frame to
the buffer memory from the host computer;
transmit logic, responsive to the means for initiating transmission, for
retrieving data from the buffer memory and supplying retrieved data for transmission
on the communications medium; and
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underrun control logic, which detects a condition in which the means for
transferring falls behind the transmit logic, and supplies a bad frame signal to the
communications medium in response to the underrun condition.
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The parties dispute the corresponding structure. In particular, the parties dispute whether
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structural limitations relating to dependent claims are necessary to perform the recited function of
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making “a threshold determination of an amount of data of the frame transferred to the buffer
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memory.”
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Claim 2 recites:
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The apparatus of claim 1, wherein the transmit buffer includes a transmit descriptor
ring buffer and a transmit data buffer, the transmit descriptors including data
identifying data to be transmitted on the communications medium and optionally
immediate data, and wherein the means for monitoring includes the immediate
data in the threshold determination.
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The written description discusses two ways the network adapter transfers data: (1) as
For the Northern District of California
United States District Court
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“immediate” data in a transfer descriptor; and (2) as downloaded data via Direct Memory Access.
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The preferred embodiment disclosed in the written description describes a network adapter that
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monitors both of these data transfers and uses them to make the threshold determination.13 However,
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both the language of the claims and the written description make clear that the use of “immediate
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data” is optional. For example, Claim 2 provides that “the transmit descriptors” include “data
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identifying data to be transmitted on the communications medium and optionally immediate data.”
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Further, the written description provides that “[t]he XMIT AREA register is used by the host to
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write transmit descriptors into the adapter. The transmit descriptors . . . include data that identifies
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data to be compiled and transmitted as a frame, and may include immediate data.”14 Therefore, the
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use of “immediate data” is not a required feature of the invention, which means that the monitoring
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of such data is not a necessary element of Claim 1.
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(‘872 Patent, Col. 21:12-26 (stating that “XMIT START THRESH provides for an early
start of transmission,” and explaining that the “XMIT START THRESH register is used to specify
the number of transmit bytes that must reside on the adapter before it will start transmission. . . . The
number of bytes considered to be available is the sum of the immediate data written to XMIT
AREA by the host and those bytes transferred to the transmit data buffers in the adapter using bus
master DMA operations.”).)
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(‘872 Patent, Col. 12:49-53.)
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The Court finds that the corresponding structure for the “means . . . for monitoring” includes
the following:
The “11bit counter 300” in Fig. 11, the “Start Thresh Reg 320” in Fig. 12, and
the “Download Compare 321” in Fig. 12, and the equivalents thereof.
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3.
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“host interface means, sharing the host address space with the host, for
managing data transfers between the host address space and the buffer memory
in operations transparent to the host system”
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Claim 1 of the ‘313 Patent claims:
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For the Northern District of California
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An apparatus for controlling communication between a host system and a network
transceiver coupled with a network, wherein the host system includes a host address
space, comprising:
a buffer memory outside of the host address space;
host interface means, sharing the host address space with the host, for
managing data transfers between the host address space and the buffer memory
in operations transparent to the host system; and
network interface means, coupled with the network transceiver, for managing
data transfers between the buffer memory and the network transceiver.
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The parties dispute the corresponding structure. In particular, the parties dispute whether the
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function of “managing data transfers between the host address space and the buffer memory in
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operations transparent to the host system” necessarily includes the function of remapping a section
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of the host address space in the host system to the buffer memory.
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The written description repeatedly and consistently states that the host interface logic
17
manages the transfer of data between the host address space and the buffer memory “in operations
18
transparent to the host system” by mapping a specific range of addresses in the host address space to
19
the buffer memory. For instance, the Abstract refers to “host interface logic emulating memory
20
mapped registers in the host address space, for transferring data between the host address space and
21
the buffer memory.” In the Summary of the Invention, the inventors explain that access to the buffer
22
memory is accomplished by automatically remapping the dedicated memory mapped page in the
23
host address space into the buffer memory:
24
27
The present invention provides a network interface controller which controls
communication between a host system and a network transceiver coupled to a
network which comprises a buffer memory outside of the host address space in which
receive and transmit buffers are managed, host interface logic responsive to a
prespecified range of host addresses, like memory mapped registers in the host
address space, for mapping data between the host address space and the buffer
28
13
25
26
1
2
3
memory . . . Because the host interface logic and network interface logic manage
accesses to the buffer memory, the host system is able to access the multiple data
buffers for transmitting and receiving data through a limited prespecified address
range. The dedicated memory mapped page in host address space is
automatically remapped through the host interface logic into the buffer memory
in operations that are transparent to the host.
4
(‘313 Patent, Col. 1:61-2:14.)
5
Moreover, the written description discusses embodiments of the host interface that use this
6
mapping technique to transfer data from host address space to the buffer memory in operations that
7
are transparent to the host. For example, the ‘313 Patent shows in Fig. 4 the transparent mapping of
8
host address space to the buffer memory:
9
11
For the Northern District of California
United States District Court
10
12
13
14
15
16
FIG. 4 provides a simplified map of the adapter interface host address block 101.
The addresses within this block appear to the host like memory mapped registers in a
continuous 8K block of the host address space in a preferred system. . . . Although
the “registers” are memory mapped to an arbitrary prespecified block of host address
space, none of the reads or writes performed by the host system to these registers
actually directly access the adapter memory. Rather, the accesses to the memory
mapped space are interpreted by the host interface logic 104 transparent to the
host system. Thus, the memory in the adapter is independent of the host address
space and of host management. FIG. 4 provides an overview mapping of the adapter
interface host address space used for accessing these registers.
(‘313 Patent, Col. 19-39.)
Therefore, the Court finds that the memory mapping function is essential to the management
17
of data transfer between the host address space and the buffer memory “in operations performed
18
independently of management by the host system,” as it is disclosed in the ‘313 Patent.15
19
Plaintiff contends that since the mapping function is omitted from the “host interface means”
20
of independent Claim 1, and instead is claimed in subsequent dependent claims, the doctrine of
21
claim differentiation16 dictates that it cannot be a limitation of Claim 1.17 However, the Court finds
22
23
24
25
15
In its First Claim Construction Order, the Court construed the function “host interface
means” as “managing data transfers between address spaces on the host system bus and the buffer
memory in operations performed independently of management by the host system.” (First Claim
Construction Order at 10-11.)
16
27
Under the doctrine of claim differentiation, “each claim in a patent is presumptively
different in scope.” Wenger Mfg., Inc. v. Coating Mach. Sys., Inc., 239 F.3d 1225, 1233 (Fed. Cir.
2001) (citation omitted). However, as the Federal Circuit has explained, claim differentiation is not
a “hard and fast rule of construction.” Id. (citation omitted). In particular, the doctrine does not
28
14
26
1
that this contention is misguided. As discussed above, the specification of the ‘313 Patent clearly
2
and repeatedly indicates that the mapping function is what allows the host interface to transfer data
3
from the host system to the buffer memory “in operations that are transparent to the host.” The
4
specification does not disclose any other embodiments that accomplish that task. Therefore, despite
5
the fact that the mapping function is claimed in subsequent dependent claims, the Court finds that it
6
is part of claim 1.
7
8
9
Accordingly, the Court finds that the corresponding structures for the “host interface means”
in Claim 1 of the ‘313 Patent are:
11
For the Northern District of California
United States District Court
10
“Host descriptor logic 150” and “download DMA logic 151” as shown in Fig. 9,
“transmit descriptor 107” as shown in Fig. 3, “transfer descriptor logic 108” and
“upload DMA logic 108” as shown in Fig. 3, and the equivalents thereof.
4.
12
13
14
Claim 13 of the ‘313 Patent provides:
15
An apparatus for controlling communication between a host system and a network
transceiver coupled with a network, wherein the host system includes a host address
space, comprising:
a buffer memory outside of the host address space, including a transmit buffer
and a receive buffer;
host interface means, sharing host address space including a prespecified
block of host addresses of limited size defining a first area and a second area,
and coupled with the buffer memory, for mapping data addressed to the first
area into the transmit buffer, mapping data in the receive buffer into the second
area, and uploading data from the receive buffer to the host; and
network interface means, coupled with the network transceiver and the buffer
memory, for transferring data from the transmit buffer to the network transceiver and
mapping data into the receive buffer from the network transceiver.
16
17
18
19
20
21
22
“host interface means, sharing host address space including a prespecified block
of host addresses of limited size defining a first area and a second area, and
coupled with the buffer memory, for mapping data addressed to the first area
into the transmit buffer, mapping data in the receive buffer into the second area,
and uploading data from the receive buffer to the host”
The parties dispute the corresponding structure.
23
24
25
26
27
28
necessarily require that “means-plus-function limitations must be interpreted without regard to other
claims.” Id.
17
(See Docket Item No. 597 at 90-92.)
15
1
The “host interface means” performs three functions: (1) “mapping data addressed to the first
2
area into the transmit buffer”; (2) “mapping data in the receive buffer into the second area”; and (3)
3
“uploading data from the receive buffer to the host.”
4
With regard to the first function of “mapping data addressed to the first area into the transmit
5
buffer,” the written description of the ‘313 Patent recites an XMIT AREA register that is used by the
6
host to write transmit descriptors into the adapter by mapping:
7
8
9
With regard to the second function of “mapping data in the receive buffer into the second
11
For the Northern District of California
United States District Court
10
The XMIT AREA register is used by the host to write transmit descriptors into the adapter.
The transmit descriptors . . . include data that identifies data to be compiled and transmitted
as a frame, and may include immediate data. The XMIT AREA at offset 0010 (hex) is
approximately 2K bytes in size. This data is mapped into a transmit descriptor ring in
the independent adapter memory as described below.18
area,” the written description of the ‘313 Patent recites: “The transfer descriptor logic maps transfer
12
descriptors from the host system to the transfer descriptor buffer.” (‘313 Patent, Col. 2:46-47.)
13
Also, the written description recites an XFER AREA through which transfer descriptors are written
14
into the buffer memory: “The XFER AREA at offset 0800 (hex) in the adapter interface host address
15
block is a buffer of approximately 1K byte through which transfer descriptors are written into the
16
independent memory of the adapter.” (‘313 Patent, Col. 10:55-58.)
17
With regard to the third function of “uploading data from the receive buffer to the host,” the
18
written description of the ‘313 Patent recites: “the upload logic is responsive to the transfer
19
descriptors in the transfer descriptor buffer, for transferring data from the receive ring buffer into
20
memory in the host system.” (‘313 Patent, Col. 2:48-51.) Further, the written description recites:
21
“The upload DMA module 57 performs data transfers from the receive buffer through the RAM
22
interface 50 to the host system.” (‘313 Patent, Col. 8:65-66.)
23
24
Thus, there in no single structure that is capable of performing all three functions. The
Court’s attention has not been drawn to anything in the intrinsic evidence that would lead the Court
25
26
27
28
18
(‘313 Patent, Col. 10:46-54.)
16
1
to find that a person of ordinary skill in the art would group these individual functional components
2
into a single component.
3
Consequently, the Court declines to further construe Claim 13 of the ‘313 Patent and
4
concludes that the lack of corresponding structure renders Claim 13 of the ‘313 Patent arguably
5
invalid. The Court invites the parties to address this matter in the course of further litigation in this
6
case.
7
5.
“network interface means, coupled with the network transceiver, for managing
data transfers between the buffer memory and the network transceiver”
8
Claim 1 of the ‘313 Patent provides:
9
An apparatus for controlling communication between a host system and a network
transceiver coupled with a network, wherein the host system includes a host address
space, comprising:
a buffer memory outside of the host address space;
host interface means, sharing the host address space with the host, for
managing data transfers between the host address space and the buffer memory in
operations transparent to the host system; and
network interface means, coupled with the network transceiver, for
managing data transfers between the buffer memory and the network
transceiver.
11
For the Northern District of California
United States District Court
10
12
13
14
15
The parties dispute the corresponding structure.
16
The written description of the ‘313 Patent discloses that the “network interface logic 104”
17 shown in Fig. 3 “manages transfers of data from buffers in the independent memory 103 and the
18 network transceiver 105.” (‘313 Patent, Col. 9:55-59.) The written description further states:
19
20
21
The network interface logic 104 includes transmit DMA logic, (generally 109) and receive
DMA logic (generally 110). The transmit DMA logic 109 is responsive to descriptors stored
in the adapter memory 103, as described below, for moving data out of the independent
adapter memory 103 to the network transceiver 105. Similarly, the receive DMA logic 110
is responsible for moving data from the transceiver 105 into the independent adapter memory
103.19
22
Accordingly, the Court finds that the corresponding structures for the “network interface
23
means” in Claim 1 of the ‘313 Patent includes:
24
In Figure 3, Network interface logic 104, and its equivalents.
25
26
27
28
19
(‘313 Patent, Col. 10:3-11.)
17
1
6.
2
“network interface means, coupled with the network transceiver and the buffer
memory, for transferring data from the transmit buffer to the network
transceiver and mapping data into the receive buffer from the network
transceiver”
3
Claim 13 of the ‘313 Patent provides:
4
An apparatus for controlling communication between a host system and a network
transceiver coupled with a network, wherein the host system includes a host address
space, comprising:
a buffer memory outside of the host address space, including a transmit buffer
and a receive buffer;
host interface means, sharing host address space including a prespecified
block of host addresses of limited size defining a first area and a second area, and
coupled with the buffer memory, for mapping data addressed to the first area into the
transmit buffer, mapping data in the receive buffer into the second area, and
uploading data from the receive buffer to the host; and
network interface means, coupled with the network transceiver and the
buffer memory, for transferring data from the transmit buffer to the network
transceiver and mapping data into the receive buffer from the network
transceiver.
5
6
7
8
9
11
For the Northern District of California
United States District Court
10
12
The parties dispute the corresponding structure.
13
The Court finds that the corresponding structure for “network interface means” in Claim 13
14 is the same as the corresponding structure identified by the Court for the “network interface means”
15 in Claim 1, as discussed above.20
16 C.
Terms Relating to the Phrase “Logic for”
17
The parties submit ten “logic for” terms for construction.21 Here, the parties’ primary dispute
18 is whether these “logic for” terms should be governed by 35 U.S.C. § 112 ¶ 6.
19
Title 35 U.S.C. § 112 ¶ 6 provides that “[a]n element in a claim for a combination may be
20 expressed as a means or step for performing a specified function without the recital of structure,
21
20
22
23
24
In particular, the Court observes that the recited function for “network interface means” in
Claim 13 of the ‘313 Patent differs only slightly from that of the same term in Claim 1. Moreover,
because the ‘313 Patent discloses only a single embodiment for both recited functions, the Court
finds the corresponding structures for “network interface means” in Claim 13 to be the same as in
Claim 1.
21
27
These terms include such phrases as “threshold logic for allowing the period of time for
the host processor to respond to the indication signal to occur during the transferring of the data
frame”; “host interface logic for transferring the data frame between the host system and the buffer
memory”; and “receive logic for mapping received data from the network transceiver to the buffer
memory.” For convenience, and because all but one of the terms include the words “logic for,” the
Court refers to them as the “logic for” terms.
28
18
25
26
1 material, or acts in support thereof.” The use of the word “means” in a claim element creates a
2 presumption that § 112 ¶ 6 applies, while the failure to use the word “means” creates a presumption
3 that § 112 ¶ 6 does not apply. Personalized Media Commc’ns, LLC v. Int’l Trade Comm’n, 161
4 F.3d 696, 703-04 (Fed. Cir. 1998) (citations omitted). A party seeking to overcome the presumption
5 that § 112 ¶ 6 does not apply bears the burden of demonstrating that the claim fails to “recite
6 sufficiently definite structure” or recites a “function without reciting sufficient structure for
7 performing that function.” Linear Tech. Corp. v. Impala Linear Corp., 379 F.3d 1311, 1319-20 (Fed.
8 Cir. 2004) (citations omitted). “To help determine whether a claim term recites sufficient structure,”
9 courts examine whether the term “has an understood meaning in the art.” Id. at 1320 (citation
11 extrinsic evidence, such as technical dictionaries. See id.; see also Personalized Media, 161 F.3d at
For the Northern District of California
United States District Court
10 omitted). In making this determination, the court may look to both intrinsic evidence and relevant
12 704-05.
13
Here, since the word “means” is not used in the “logic for” terms, there is a rebuttable
14 presumption that § 112 ¶ 6 does not apply. Personalized Media, 161 F.3d at 704. Accordingly, the
15 Court considers whether Defendants meet their burden of demonstrating that the claim elements
16 involving the “logic for” terms fail to recite sufficient structure, and in particular considers whether
17 the “logic for” terms have “understood meaning[s] in the art.” Linear Tech., 329 F.3d at 1319-20.
18
Upon review, the Court finds that the ten “logic for” terms have understood meanings in the
19 art. In particular, the Court finds that technical dictionaries, “which are evidence of the
20 understandings of persons of skill in the technical arts,”22 indicate that the word “logic,” as used in
21 the context of the “logic for” terms in dispute here, connotes “circuitry.”23 The Federal Circuit has
22 made clear that “circuit” is a “structure-connoting term,” which, when “coupled with a description of
23 the circuit’s operation,” will generally convey “sufficient structural meaning” to persons of ordinary
24
25
22
26
23
27
28
Linear Tech., 379 F.3d at 1320.
See, e.g., MCGRAW-HILL DICTIONARY OF ELECTRONICS AND COMPUTER TECHNOLOGY
308 (3d ed. 1984) (explaining that “logic” is a “[g]eneral term for the various types of . . . circuits
used to perform problem-solving functions in a digital computer”).
19
1 skill in the art such that § 112 ¶ 6 will not apply. Linear Tech., 379 F.3d at 1320. Likewise, the
2 word “logic,” when used as the Court finds it is used here–namely, to connote “circuitry”–is also,
3 and for the same reasons, a structure-connoting term. Moreover, the Court finds that each of the
4 disputed “logic for” terms is associated with a description of the operation of the relevant circuit, and
5 that these descriptions convey sufficient structural meaning to persons of ordinary skill in the art
6 such that § 112 ¶ 6 does not apply.
7
Accordingly, the Court finds that the disputed “logic for” terms are not governed by 35
8 U.S.C. § 112 ¶ 6.
9
III. CONCLUSION
The Court has construed the disputed phrases as tendered by the parties in their Supplemental
11 Briefs.
For the Northern District of California
United States District Court
10
12
Upon the Court’s imminent retirement,24 the case will be reassigned in due course.25
13
14
15 Dated: August 29, 2012
JAMES WARE
United States District Chief Judge
16
17
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20
21
22
23
24
25
26
27
28
24
On April 28, 2012, Chief Judge Ware announced that he plans to “retire in August 2012 as
the terms of his current law clerks come to an end.” See Chief Judge Ware Announces Transition,
available at http://www.cand.uscourts.gov/news/82.
25
Accordingly, the Court DENIES Intel’s Motion to Schedule a Further Case Management
Conference as premature at this time as the new judge will set up a further conference upon
reassignment. (See Docket Item No. 632.)
20
1 THIS IS TO CERTIFY THAT COPIES OF THIS ORDER HAVE BEEN DELIVERED TO:
11
Dated: August 29, 2012
For the Northern District of California
United States District Court
2 Deepak Gupta dgupta@fbm.com
Eugene Y. Mar emar@fbm.com
3 Harold H. Davis harold.davis@klgates.com
James Carl Otteson jim@agilityiplaw.com
4 Jas S Dhillon jas.dhillon@klgates.com
Jeffrey M. Fisher jfisher@fbm.com
5 Jeffrey Michael Ratinoff jeffrey.ratinoff@klgates.com
John L. Cooper jcooper@fbm.com
6 Kyle Dakai Chen kyle.chen@cooley.com
Mark R. Weinstein mweinstein@cooley.com
7 Michelle Gail Breit mbreit@agilityiplaw.com
Nan E. Joesten njoesten@fbm.com
8 Paul A. Alsdorf palsdorf@fbm.com
Samuel Citron O’Rourke eupton@whitecase.com
9 Stephanie Powers Skaff sskaff@fbm.com
Timothy Paar Walker timothy.walker@klgates.com
10 William Sloan Coats william.coats@kayescholer.com
Richard W. Wieking, Clerk
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By:
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/s/ JW Chambers
William Noble
Courtroom Deputy
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